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Mok Vee Hoong

Publications and source records attributed to Mok Vee Hoong.

3 recordsLinked to original sources

Static Quantized Radix-2 FFT/IFFT Processor for Constraints Analysis

This research work focuses on the design of a high-resolution fast Fourier transform (FFT) /inverse fast Fourier transform (IFFT) processors for constraints analysis purpose. Amongst the major setbacks associated with such high resolution, FFT processors are the high power consumption resulting from the structural complexity and computational inefficiency of floating-point calculations. As such, a parallel pipelined architecture was proposed to statically scale the resolution of the processor to suite adequate trade-off constraints. The quantization was applied to provide an approximation to address the finite word-length constraints of digital signal processing (DSP). An optimum operating mode was proposed, based on the signal-to-quantization-noise ratio (SQNR) as well as the statistical theory of quantization, to minimize the tradeoff issues associated with selecting the most application-efficient floating-point processing capability in contrast to their resolution quality.

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Smart Analytical Signature Verification For DSP Applications

Signature verification is an authentication technique that considers handwritten signature as a biometric. From a biometric perspective this project made use of automatic means through an integration of intelligent algorithms to perform signal enhancement function such as filtering and smoothing for optimization in conventional biometric systems. A handwritten signature is a 1D Daubechies wavelet signal (db4) that utilizes Discrete Wavelet Transform (DWT) and Discrete Cosine Transform (DCT) collectively to create a feature dataset with d-dimensional space. In the proposed work the statistical features characteristics are extracted from each particular signature per data source. Two databases called Signature Verification Competition (SVC) 2004 database and SUBCORPUS 100 MCYT Bimodal database are used to cooperate with the design algorithm. Furthermore dimension reduction technique is applied to the large feature vectors. A system model is trained and evaluated using the support vector machine (SVM) classifier algorithm. Hence an equal error rate (EER) of 8.7 percent and an average correct verification rate of 91.3 percent

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Smart GSM Based Home Automation System

This research work investigates the potential of Full Home Control, which is the aim of the Home Automation Systems in near future. The analysis and implementation of the home automation technology using Global System for Mobile Communication (GSM) modem to control home appliances such as light, conditional system, and security system via Short Message Service (SMS) text messages is presented in this paper. The proposed research work is focused on the functionality of the GSM protocol, which allows the user to control the target system away from residential using the frequency bandwidths. The concept of serial communication and AT-commands has been applied towards the development of the smart GSM-based home automation system. Homeowners will be able to receive feedback status of any home appliances under control whether switched on or off remotely from their mobile phones. PIC16F887 microcontroller with the integration of GSM provides the smart automated house system with the desired baud rate of 9600 bps. The proposed prototype of GSM based home automation system was implemented and tested with a maximum of four loads and shows the accuracy of greater or equal 98%.

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