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Moshe Azoulay

Publications and source records attributed to Moshe Azoulay.

2 recordsLinked to original sources

A Modified Boost Converter Topology for Dynamic Characterization of Hot Carrier and Trap Generation in GaN HEMTs

Modern microelectronic systems require long term operational stability, necessitating precise reliability models to predict device lifecycles and identify governing failure mechanisms. This is particularly critical for high power GaN High-Electron-Mobility Transistors (HEMTs), where reliability research has historically trailed behind low power digital counterparts. This study introduces a novel application of a modified boost converter circuit designed to investigate GaN failure mechanisms, specifically targeting the determination of reliability factors for the MTOL model. By utilizing a high duty cycle, the circuit stresses the device at maximum rated voltages and currents with minimal input requirements, accelerating hot carrier and trap generation without immediate detrimental failure. Experimental validation was conducted using an EPC 2038 GaN transistor under a constant drain current of 400 mA and a duty cycle of 0.7. The results confirmed that the increase in Drain-Source on-resistance ($R_{DS(on)}$) follows a logarithmic trend over time, consistent with the EPC Phase 12 reliability model. While initial tests at 40V did not successfully validate the longitudinal optical phonon scattering energy ($\hbar\omega_{LO}$), but were reasonably acceptable, subsequent stress tests at 70V and 100V yielded $\hbar\omega_{LO}$ values that were successfully validated against existing theoretical and experimental data. This methodology provides a robust framework for predicting performance and lifetime across varying operational parameters in modern power electronics.

eess.SY

Recycling rejected silicon wafers and dies for high grade PV cells

The recent return of the US to the Paris Climate Accord, massive increase in solar panel production and energy storage solutions has resulted in pressure on supply for solar cell materials and recycling of panels installed in the 90's and beginning of the 2000's which have reached their end of life. In this work we focus on recycling silicon wafers and dies by stripping previous structures from the die using potent acids after which its base material is characterized and binned. We demonstrate the process for silicon p-type substrates where n-type doping is attained by using a simple solution of phosphoric acid, which is diffused into the substrate using a furnace thus creating a PN junction. In case the substrate is n-type it could be replaced by boric acid. This is followed by deposition of a conductive antireflective coating, bus bars and rear wafer metal coating. The initial demonstrated laboratory results indicate the feasibility of recycling wafers using simple low cost standard industrial methods.

physics.app-ph