arXiv subjects

Najm Us Saqib

Publications and source records attributed to Najm Us Saqib.

3 recordsLinked to original sources

arXiv2025

ALS-U AR RF Equipment Protection System

This paper presents the design and status of Accumulator Ring (AR) RF Equipment Protection System (EPS) of Advanced Light Source Upgrade project at LBNL. The key components of AR RF EPS include a Master Interlock PLC subsystem handling supervisory control and slow interlocks in \SI{}{\milli\second} scale, an FPGA-based LLRF Controller managing fast interlocks in \SI{}{\micro\second} scale, a 60 kW high-power amplifier with standalone PLC-based slow (\SI{}{\milli\second} scale) and FPGA-based fast (\SI{}{\micro\second} scale) protection systems, and an RF Drive Control Chassis acting as primary RF mitigation device. The design of AR RF EPS is presented along with internal RF and external AR subsystems interfaces.

physics.acc-ph↗

arXiv2025

ALS Storage Ring RF Control System Upgrade Plan and Status

The Advanced Light Source (ALS) at Lawrence Berkeley National Laboratory, a third-generation synchrotron light source operational since 1992, is undergoing a comprehensive upgrade of its storage ring RF control system. The legacy Horner PLC controllers and remote I/O modules, now at end-of-life, are being replaced with an Allen-Bradley PLC platform to improve maintainability, reliability, and long-term support. This paper presents the planning, design, and current status of the upgrade project.

physics.acc-ph↗

arXiv2022

Digital Low-Level RF control system for Accumulator Ring at Advanced Light Source Upgrade Project

Currently ALS is undergoing an upgrade to ALSU to produce 100 times brighter soft X-ray light. The LLRF system for Accumulator Ring (AR) is composed of two identical LLRF stations, for driving RF amplifiers. The closed loop RF amplitude and phase stability is measured as $< 0.1\%$ and $< 0.1^\circ$ respectively, using the non-IQ digital down conversion together with analog up/down conversion, under a system-on-chip architecture. Realtime interlock system is implemented with $< 2 μ$s latency, for machine protection against arc flash and unexpected RF power. Control interfaces are developed to enable PLC-FPGA-EPICS communication to support operation, timing, cavity tuning, and interlock systems. The LLRF system handles alignment of buckets to swap beams between AR and Storage Ring by synchronous phase loop ramping between the two cavities. The system also includes an optimization routine to characterize the loop dynamics and determine optimal operating point using a built-in network analyzer feature. A cavity emulator of 31 kHz bandwidth is integrated with the LLRF system to validate the performance of the overall system being developed.

physics.acc-ph↗