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Nikolai Yurttagül

Publications and source records attributed to Nikolai Yurttagül.

6 recordsLinked to original sources

A scalable non-superconducting tunnel junction technology

Tunnel junctions are one of the key elements of chip-scale microsystems serving various technologies from classical microelectronics to quantum information. Aluminium and its oxide (AlOx) have dominated cryogenic tunnel junction technology for decades due to the high quality of AlOx barriers and Al superconducting properties below 1.2 K. However, many applications require non-superconducting junctions, either standalone or in combination with superconducting technology, motivating efforts to suppress Al superconductivity through magnetic fields, doping, or proximity effects -- approaches that so far suffered from integration compatibility and scalability issues. Here, we present a CMOS-compatible normal-metal tunnel junction technology based on TiW alloy and AlOx barriers. We demonstrate wafer-scale fabrication of TiW/Al-AlOx/TiW junctions and validate their performance in Coulomb blockade thermometers operating down to 20 mK, confirming robust normal-state behavior. This TiW-based architecture offers a scalable solution for non-superconducting tunnel junctions across a broad temperature range, enabling integration into advanced cryogenic, quantum and nanoelectronic chip-level systems.

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Millikelvin Si-MOSFETs for Quantum Electronics

Large power consumption of silicon CMOS electronics is a challenge in very-large-scale integrated circuits and a major roadblock to fault-tolerant quantum computation. Matching the power dissipation of Si-MOSFETs to the thermal budget at deep cryogenic temperatures, below 1 K, requires switching performance beyond levels facilitated by currently available CMOS technologies. We have manufactured fully depleted silicon-on-insulator MOSFETs tailored for overcoming the power dissipation barrier towards sub-1 K applications. With these cryo-optimized transistors we achieve a major milestone of reaching subthreshold swing of 0.3 mV/dec at 420 mK, thereby enabling very-large-scale integration of cryo-CMOS electronics for ultra-low temperature applications.

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Microkelvin electronics on a pulse-tube cryostat with a gate Coulomb blockade thermometer

Access to lower temperatures has consistently enabled scientific breakthroughs. Pushing the limits of \emph{on-chip} temperatures deep into the microkelvin regime would open the door to unprecedented quantum coherence, novel quantum states of matter, and also the discovery of unexpected phenomena. Adiabatic demagnetization is the workhorse of microkelvin cooling, requiring a dilution refrigerator precooling stage. Pulse-tube dilution refrigerators have grown enormously in popularity due to their vast experimental space and independence of helium, but their unavoidable vibrations are making microkelvin cooling very difficult. On-chip thermometry in this unexplored territory is also not a trivial task due to extreme sensitivity to noise. Here, we present a pulse-tube compatible microkelvin sample holder with on-board cooling and microwave filtering and introduce a new type of temperature sensor, the gate Coulomb blockade thermometer (gCBT), working deep into the microkelvin regime. Using on- and off-chip cooling, we demonstrate electronic temperatures as low as 224$\pm$7$μ$K, remaining below 300$μ$K for 27 hours, thus providing sufficient time for measurements. Finally, we give an outlook for cooling below 50$μ$K for a new generation of microkelvin transport experiments.

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Coulomb blockade thermometry beyond the universal regime

The charge localization of single electrons on mesoscopic metallic islands leads to a suppression of the electrical current, known as the Coulomb blockade. When this correction is small, it enables primary electron thermometry, as it was first demonstrated by Pekola et al. (Phys. Rev. Letters, 73, 2903 [1994]). However, in the low temperature limit, random charge offsets influence the conductance and limit the universal behavior of a single metallic island. In this work, we numerically investigate the conductance of a junction array, and demonstrate the extension of the primary regime for large arrays, even when the variations in the device parameters are taken into account. We find that our simulations agree well with measured conductance traces in the submillikelvin electron temperature regime.

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500 microkelvin nanoelectronics

Fragile quantum effects such as single electron charging in quantum dots or macroscopic coherent tunneling in superconducting junctions are the basis of modern quantum technologies. These phenomena can only be observed in devices where the characteristic spacing between energy levels exceeds the thermal energy, $k_\textrm{B}T$, demanding effective refrigeration techniques for nanoscale electronic devices. Commercially available dilution refrigerators have enabled typical electron temperatures in the $10$ to $100\,$mK regime, however indirect cooling of nanodevices becomes inefficient due to stray radiofrequency heating and weak thermal coupling of electrons to the device substrate. Here we report on passing the millikelvin barrier for a nanoelectronic device. Using a combination of on-chip and off-chip nuclear refrigeration, we reach an ultimate electron temperature of $T_\textrm{e}=421\pm35\,μ$K and a hold time exceeding $85\,$hours below $700\,μ$K measured by a self-calibrated Coulomb-blockade thermometer.

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Indium as a high cooling power nuclear refrigerant for quantum nanoelectronics

The frontiers of quantum electronics have been linked to the discovery of new refrigeration methods since the discovery of superconductivity at a temperature around $4\,$K, enabled by the liquefaction of helium. Since then, the advances in cryogenics led to discoveries such as the quantum Hall effect and new technologies like superconducting and semiconductor quantum bits. Presently, nanoelectronic devices typically reach electron temperatures around $10\,$mK to $100\,$mK by commercially available dilution refrigerators. However, cooling electrons via the encompassing lattice vibrations, or phonons, becomes inefficient at low temperatures. Further progress towards lower temperatures requires new cooling methods for electrons on the nanoscale, such as direct cooling with nuclear spins, which themselves can be brought to microkelvin temperatures by adiabatic demagnetization. Here, we introduce indium as a nuclear refrigerant for nanoelectronics and demonstrate that solely on-chip cooling of electrons is possible down to $3.2\pm0.1\,$mK, limited by the heat leak via the electrical connections of the device.

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