arXiv subjects

Nikolaos Mavredakis

Publications and source records attributed to Nikolaos Mavredakis.

14 recordsLinked to original sources

arXiv2025

An extended low-frequency noise compact model for single-layer graphene FETs including correlated mobility fluctuations effect

Correlated mobility fluctuations are considered in the physics-based carrier number fluctuation deltaN low-frequency noise (LFN) compact model of single-layer graphene field effect transistors (GFET) in the present study. Trapped charge density and Coulomb scattering coefficient deltaN LFN parameters are obtained after applying a parameter extraction methodology, adapted from conventional silicon technologies, to the linear ambipolar regions of GFETs. Appropriate adjustments are considered in the method according to GFETs physical characteristics. Afterwards, Hooge mobility as well as series resistance fluctuations LFN parameters can be extracted. The updated LFN model is validated with experimental data from various long and short-channel GFETs at an extended range of gate and drain bias conditions.

cond-mat.mes-hall↗

arXiv2024

A Scalable Compact Model for the Static Drain Current of Graphene FETs

The main target of this article is to propose for the first time a physics-based continuous and symmetric compact model that accurately captures IV experimental dependencies induced by geometrical scaling effects for graphene transistor (GFET) technologies. Such a scalable model is an indispensable ingredient for the boost of large-scale GFET applications, as it has been already proved in solid industry-based CMOS technologies. Dependencies of the physical model parameters on channel dimensions, are thoroughly investigated, and semi?empirical expressions are derived, which precisely characterize such behaviors for an industry-based GFET technology, as well as for others developed in research labs. This work aims at the establishment of the first industry standard GFET compact model that can be integrated in circuit simulation tools and hence, can contribute to the update of GFET technology from the research level to massive industry production.

physics.app-ph↗

arXiv2023

Physics-based bias-dependent compact modeling of 1/f noise in single- to few- layer 2D-FETs

1/f noise is a critical figure of merit for the performance of transistors and circuits. For two-dimensional devices (2D-FETs), and especially for applications in the GHz range where short-channel FETs are required, velocity saturation (VS) effect can result in the reduction of 1/f noise at high longitudinal electric fields. A new physics-based compact model is for the first time introduced for single- to few- layer 2D-FETs in this study, precisely validating 1/f noise experiments for various types of devices. The proposed model mainly accounts for the measured 1/f noise bias dependence as the latter is defined by different physical mechanisms. Thus, analytical expressions are derived, valid in all regions of operation in contrast to conventional approaches available in literature so far, accounting for carrier number fluctuation (DN), mobility fluctuation (Dmu}) and contact resistance (DR) effects based on the underlying physics that rules these devices. DN mechanism due to trapping/detrapping together with an intense Coulomb scattering effect, dominates 1/f noise from medium to strong accumulation region while Dmu, is also demonstrated to modestly contribute in subthreshold region. DR can also be significant in very high carrier density. The VS induced reduction of 1/f noise measurements at high electric fields, is also remarkably captured by the model. The physical validity of the model can also assist in extracting credible conclusions when conducting comparisons between experimental data from devices with different materials or dielectrics.

cond-mat.mes-hall↗

arXiv2023

Straightforward Bias and Frequency Dependent Small-Signal Model Extraction for Single-Layer Graphene FETs

We propose an explicit small-signal graphene field-effect transistor (GFET) parameter extraction procedure based on a charge-based quasi-static model. The dependence of the small-signal parameters on both gate voltage and frequency is precisely validated by high-frequency (up to 18 GHz) on-wafer measurements from a 300 nm device. These parameters are studied simultaneously, in contrast to other works which focus exclusively on few. Efficient procedures have been applied to GFETs for the first time to remove contact and gate resistances from the Y-parameters. The use of these methods yields straightforward equations for extracting the small-signal model parameters, which is extremely useful for radio-frequency circuit design. Furthermore, we show for the first time experimental validation vs. both gate voltage and frequency of the intrinsic GFET non-reciprocal capacitance model. Accurate models are also presented for the gate voltage-dependence of the measured unity-gain and maximum oscillation frequencies as well as of the current and power gains.

cond-mat.mes-hall↗

arXiv2022

Compact modeling technology for the simulation of integrated circuits based on graphene field-effect transistors

In this study, we report the progress made towards the definition of a modular compact modeling technology for graphene field-effect transistors (GFET) that enables the electrical analysis of arbitrary GFET-based integrated circuits. A set of primary models embracing the main physical principles defines the ideal GFET response under DC, transient (time domain), AC (frequency domain), and noise (frequency domain) analysis. Other set of secondary models accounts for the GFET non-idealities, such as extrinsic-, short-channel-, trapping/detrapping-, self-heating-, and non-quasi static-effects, which could have a significant impact under static and/or dynamic operation. At both device and circuit levels, significant consistency is demonstrated between the simulation output and experimental data for relevant operating conditions. Additionally, we provide a perspective of the challenges during the scale up of the GFET modeling technology towards higher technology readiness levels while drawing a collaborative scenario among fabrication technology groups, modeling groups, and circuit designers.

physics.app-ph↗

arXiv2022

An extraction method for mobility degradation and contact resistance of graphene transistors

The intrinsic mobility degradation coefficient, contact resistance and the transconductance parameter of graphene field-effect transistors (GFETs) are extracted for different technologies by considering a novel transport model embracing mobility degradation effects within the charge channel control description. By considering the mobility degradation-based model, a straightforward extraction methodology, not provided before, is enabled by applying the concept of the well-known Y-function to the \textit{I-V} device characteristics. The method works regardless the gate device architecture. An accurate description of experimental data of fabricated devices is achieved with the underlying transport equation by using the extracted parameters. An evaluation of the channel resistance, enabled by the extracted parameters here, has been also provided.

cond-mat.mes-hall↗

arXiv2021

Bias-dependent intrinsic RF thermal noise modeling and characterization of single layer graphene FETs

In this article, the bias-dependence of intrinsic channel thermal noise of single-layer graphene field-effect transistors (GFETs) is thoroughly investigated by experimental observations and compact modeling. The findings indicate an increase of the specific noise as drain current increases whereas a saturation trend is observed at very high carrier density regime. Besides, short-channel effects like velocity saturation also result in an increment of noise at higher electric fields. The main goal of this work is to propose a physics-based compact model that accounts for and accurately predicts the above experimental observations in short-channel GFETs. In contrast to long-channel MOSFET based models adopted previously to describe thermal noise in graphene devices without considering the degenerate nature of graphene, in this work a model for short-channel GFETs embracing the 2D materials underlying physics and including a bias dependency is presented. The implemented model is validated with de-embedded high frequency data from two short-channel devices at Quasi-Static region of operation. The model precisely describes the experimental data for a wide range of low to high drain current values without the need of any fitting parameter. Moreover, the consideration of the degenerate nature of graphene reveals a significant decrease of noise in comparison with the non degenerate case and the model accurately captures this behavior. This work can also be of outmost significance from circuit designers aspect, since noise excess factor, a very important figure of merit for RF circuits implementation, is defined and characterized for the first time in graphene transistors.

cond-mat.mes-hall↗

arXiv2021

Input referred low-frequency noise analysis for single-layer graphene FETs

The bias-dependence of input referred low-frequency noise (LFN), SVG, is a considerable facet for RF circuit design. SVG was considered constant in silicon transistors but this was contradicted by recent experimental and theoretical studies. In this letter, the behaviour of SVG is investigated for single-layer graphene transistors based on a recently established physics-based complete compact LFN model. A minimum of SVG is recorded at the bias point where maximum transconductance is located which coincides with the peak of the well-known M-shape of the normalized output LFN and the model precisely captures this trend. Mobility fluctuation effect increases SVG towards to lower currents near charge neutrality point (CNP) while carrier number fluctuation and series resistance effects mostly contribute away from CNP; thus, SVG obtains a parabolic shape vs. gate voltage similarly to CMOS devices.

physics.app-ph↗

arXiv2020

Experimental observation and modeling of the impact of traps on static and analog/HF performance of graphene transistors

The trap-induced hysteresis on the performance of a graphene field-effect transistor is experimentally diminished here by applying consecutive gate-to-source voltage pulses of opposing polarity. This measurement scheme is a practical and suitable approach to obtain reproducible device characteristics. Trap-affected and trap-free experimental data enable a discussion regarding the impact of traps on static and dynamic device performance. An analytical drain current model calibrated with the experimental data enables the study of the traps effects on the channel potential within the device. High-frequency figures of merit and the intrinsic gain of the device obtained from both experimental and synthetic data with and without hysteresis show the importance of considering the generally overlooked impact of traps for analog and high-frequency applications.

cond-mat.mes-hall↗

arXiv2020

Charge-Based Compact Model for Bias-Dependent Variability of 1/f Noise in MOSFETs

Variability of low frequency noise (LFN) in MOSFETs is bias-dependent. Moderate- to large-sized transistors commonly used in analog/RF applications show 1/f-like noise spectra, resulting from the superposition of random telegraph noise (RTN). Carrier number and mobility fluctuations are considered as the main causes of low frequency noise. While their effect on the bias-dependence of LFN has been well investigated, the way these noise mechanisms contribute to the bias-dependence of variability of LFN has been less well understood. LFN variability has been shown to be maximized in weak inversion (sub-threshold), while increased drain bias also increases LFN variability. However, no compact model has been proposed to explain this bias-dependence in detail. In combination with the charge-based formulation of LFN, the present paper proposes a new model for bias-dependence of LFN variability. Comparison with experimental data from moderately-sized NMOS and PMOS transistors at all bias conditions provides insight into how carrier number and mobility fluctuation mechanisms impact the bias-dependence of LFN variability.

cond-mat.mes-hall↗

arXiv2020

Bias Dependent Variability of Low Frequency Noise in Single Layer Graphene FETs

Low-frequency noise (LFN) variability in graphene transistors (GFETs) is for the first time researched in this work. LFN from an adequate statistical sample of long-channel solution-gated single-layer GFETs is measured in a wide range of operating conditions while a physics-based analytical model is derived that accounts for the bias dependence of LFN variance with remarkable performance. It is theoretically proved and experimentally validated that LFN deviations in GFETs stem from physical mechanisms that generate LFN. Thus, carrier number DN due to trapping/detrapping process and mobility fluctuations Dm which are the main causes of LFN, define its variability likewise as its mean value. DN accounts for an M-shape of normalized LFN variance versus gate bias with a minimum at the charge neutrality point (CNP) as it was the case for normalized LFN mean value while Dm contributes only near the CNP for both variance and mean value. Trap statistical nature is experimentally shown to differ from classical Poisson distribution at silicon-oxide devices, and this is probably caused by electrolyte interface in GFETs under study. Overall, GFET technology development is still in a premature stage which might cause pivotal inconsistencies affecting the scaling laws in GFETs of the same process.

physics.app-ph↗

arXiv2020

Low-frequency noise parameter extraction method for single layer graphene FETs

In this paper, a detailed parameter extraction methodology is proposed for low-frequency noise (LFN) in single layer (SL) graphene transistors (GFETs) based on a recently established compact LFN model. Drain current and LFN of two short channel back-gated GFETs (L=300, 100 nm) were measured at lower and higher drain voltages, for a wide range of gate voltages covering the region away from charge neutrality point (CNP) up to CNP at p-type operation region. Current-voltage (IV) and LFN data were also available from a long channel SL top solution-gated (SG) GFET (L=5 um), for both p- and n-type regions near and away CNP. At each of these regimes, the appropriate IV and LFN parameters can be accurately extracted. Regarding LFN, mobility fluctuation effect is dominant at CNP and from there the Hooge parameter aH can be extracted while the carrier number fluctuation contribution which is responsible for the well-known M-shape bias dependence of output noise divided by squared drain current, also observed in our data, makes possible the extraction of the NT parameter related to the number of traps. In the less possible case of a Lambda-shape trend, NT and aH can be extracted simultaneously from the region near CNP. Away from CNP, contact resistance can have a significant contribution to LFN and from there the relevant parameter SDR^2 is defined. The LFN parameters described above can be estimated from the low drain voltage region of operation where the effect of Velocity Saturation (VS) mechanism is negligible. VS effect results in the reduction of LFN at higher drain voltages and from there the IV parameter hOmega which represents the phonon energy and is related to VS effect can be derived both from drain current and LFN data.

physics.app-ph↗

arXiv2019

Velocity Saturation effect on Low Frequency Noise in short channel Single Layer Graphene FETs

Graphene devices for analog and RF applications are prone to Low Frequency Noise (LFN) due to its upconversion to undesired phase noise at higher frequencies. Such applications demand the use of short channel graphene transistors that operate at high electric fields in order to ensure a high speed. Electric field is inversely proportional to device length and proportional to channel potential so it gets maximized as the drain voltage increases and the transistor length shrinks. Under these conditions though, short channel effects like Velocity Saturation (VS) should be taken into account. Carrier number and mobility fluctuations have been proved to be the main sources that generate LFN in graphene devices. While their contribution to the bias dependence of LFN in long channels has been thoroughly investigated, the way in which VS phenomenon affects LFN in short channel devices under high drain voltage conditions has not been well understood. At low electric field operation, VS effect is negligible since carriers velocity is far away from being saturated. Under these conditions, LFN can be precicely predicted by a recently established physics-based analytical model. The present paper goes a step furher and proposes a new model which deals with the contribution of VS effect on LFN under high electric field conditions. The implemented model is validated with novel experimental data, published for the first time, from CVD grown back-gated single layer graphene transistors operating at gigahertz frequencies. The model accurately captures the reduction of LFN especially near charge neutrality point because of the effect of VS mechanism. Moreover, an analytical expression for the effect of contact resistance on LFN is derived. This contact resistance contribution is experimentally shown to be dominant at higher gate voltages and is accurately described by the proposed model.

cond-mat.mes-hall↗

arXiv2018

Understanding the Bias Dependence of Low Frequency Noise in Sin-gle Layer Graphene FETs

This letter investigates the bias-dependent low frequency noise of single layer graphene field-effect transistors. Noise measurements have been conducted with electrolyte-gated graphene transistors covering a wide range of gate and drain bias conditions for different channel lengths. A new analytical model that accounts for the propagation of the local noise sources in the channel to the terminal currents and voltages is proposed in this paper to investigate the noise bias dependence. Carrier number and mobility fluctuations are considered as the main causes of low frequency noise and the way these mechanisms contribute to the bias dependence of the noise is analyzed in this work. Typically, normalized low frequency noise in graphene devices has been usually shown to follow an M-shape dependence versus gate voltage with the minimum near the charge neutrality point (CNP). Our work reveals for the first time the strong correlation between this gate dependence and the residual charge which is relevant in the vicinity of this specific bias point. We discuss how charge inhomogeneity in the graphene channel at higher drain voltages can contribute to low frequency noise; thus, channel regions nearby the source and drain terminals are found to dominate the total noise for gate biases close to the CNP. The excellent agreement between the experimental data and the predictions of the analytical model at all bias conditions confirms that the two fundamental 1/f noise mechanisms, carrier number and mobility fluctuations, must be considered simultaneously to properly understand the low frequency noise in graphene FETs. The proposed analytical compact model can be easily implemented and integrated in circuit simulators, which can be of high importance for graphene based circuits design.

cond-mat.mes-hall↗