arXiv subjects

Norbert Wermes

Publications and source records attributed to Norbert Wermes.

At least 19 recordsLinked to original sources

arXiv2025

X-ray Irradiation Studies on the Monopix DMAPS in 150$\,$nm and 180$\,$nm

Monolithic active pixel sensors with depleted substrates present a promising option for pixel detectors in high-radiation environments. High-resistivity silicon substrates and high bias voltage capabilities in commercial CMOS technologies facilitate depletion of the charge sensitive volume. TJ-Monopix2 and LF-Monopix2 are the most recent large-scale chips in their respective development line, aiming for the ATLAS Inner Tracker outer layer requirements. Those include a tolerance to ionizing radiation of up to 100$\,$Mrad. It was evaluated by irradiating both devices with X-rays to the corresponding ionization dose, showing no significant degradation of the performance at 100$\,$Mrad and continuous operability throughout the irradiation campaign.

physics.ins-det↗

arXiv2024

Cross talk of a large-scale depleted monolithic active pixel sensor (DMAPS) in 180 nm CMOS technology

Monolithic pixel detectors combine readout electronics and sensor in a single entity of silicon, which simplifies the production procedure and lowers the material budget compared to conventional hybrid pixel detector concepts. Benefiting from the advances in commercial CMOS processes towards large biasing voltage capabilities and the increasing availability of high-resistivity substrates, depleted monolithic active pixel sensors (DMAPS) are able to cope with the high-rate and high-radiation environments faced in modern high-energy physics experiments. TJ-Monopix2 is the latest iteration of a DMAPS development line designed in 180 nm TowerSemicondutor technology, which features a large scale (2 x 2) cm$^2$ chip divided into (512 x 512) pixels with a pitch of (33 x 33) um$^2$. All in-pixel electronics are separated from its small collection electrode and process modifications are implemented to improve charge collection efficiency especially after irradiation. The latest laboratory measurements and investigations of a threshold variation observed for TJ-Monopix2 in typical operating conditions are presented.

physics.ins-det↗

arXiv2023

Charge collection and efficiency measurements of the TJ-Monopix2 DMAPS in 180$\,$nm CMOS technology

Monolithic CMOS pixel detectors have emerged as competitive contenders in the field of high-energy particle physics detectors. By utilizing commercial processes they offer high-volume production of such detectors. A series of prototypes has been designed in a 180$\,$nm Tower process with depletion of the sensor material and a column-drain readout architecture. The latest iteration, TJ-Monopix2, features a large 2$\,$cm x 2$\,$cm matrix consisting of 512 x 512 pixels with 33.04$\,$um pitch. A small collection electrode design aims at low power consumption and low noise while the radiation tolerance for high-energy particle detector applications needs extra attention. With a goal to reach radiation tolerance to levels of $10^{15}\,1\,$MeV n$_\text{eq}\,$cm$^{-2}$ of NIEL damage a modification of the standard process has been implemented by adding a low-dosed n-type silicon implant across the pixel in order to allow for homogeneous depletion of the sensor volume. Recent lab measurements and beam tests were conducted for unirradiated modules to study electrical characteristics and hit detection efficiency.

physics.ins-det↗

arXiv2021

Characterization of passive CMOS sensors with RD53A pixel modules

Both the current upgrades to accelerator-based HEP detectors (e.g. ATLAS, CMS) and also future projects (e.g. CEPC, FCC) feature large-area silicon-based tracking detectors. We are investigating the feasibility of using CMOS foundries to fabricate silicon radiation detectors, both for pixels and for large-area strip sensors. A successful proof of concept would open the market potential of CMOS foundries to the HEP community, which would be most beneficial in terms of availability, throughput and cost. In addition, the availability of multi-layer routing of signals will provide the freedom to optimize the sensor geometry and the performance, with biasing structures implemented in poly-silicon layers and MIM-capacitors allowing for AC coupling. A prototyping production of strip test structures and RD53A compatible pixel sensors was recently completed at LFoundry in a 150nm CMOS process. This presentation will focus on the characterization of pixel modules, studying the performance in terms of charge collection, position resolution and hit efficiency with measurements performed in the laboratory and with beam tests. We will report on the investigation of RD53A modules with 25x100 mu^2 cell geometry.

physics.ins-det↗

arXiv2021

Radiation tolerant, thin, passive CMOS sensors read out with the RD53A chip

The radiation hardness of passive CMOS pixel sensors fabricated in 150 nm LFoundry technology is investigated. CMOS process lines are especially of interest for large-scale silicon detectors as they offer high production throughput at comparatively low cost. Moreover, several features like poly-silicon resistors, MIM-capacitors and several metal layers are available which can help enhance the sensor design. The performance of a 100 $\mathrm{\mu}$m thin passive CMOS sensor with a pixel pitch of 50 $\mathrm{\mu}$m at different irradiation levels, 5 $\times$ 10$^{15}$n$_{\mathrm{eq}}$cm$^{-2}$ and 1 $\times$ 10$^{16}$n$_{\mathrm{eq}}$cm$^{-2}$, is presented. The sensor was bump-bonded and read out using the RD53A readout chip. After the highest fluence a hit-detection efficiency larger than 99% is measured for minimum ionising particles. The measured equivalent noise charge is comparable to conventional planar pixel sensors. Passive CMOS sensors are thus an attractive option for silicon detectors operating in radiation harsh environments like the upgrades for the LHC experiments.

physics.ins-det↗

arXiv2020

DMAPS Monopix developments in large and small electrode designs

LF-Monopix1 and TJ-Monopix1 are depleted monolithic active pixel sensors (DMAPS) in 150 nm LFoundry and 180 nm TowerJazz CMOS technologies respectively. They are designed for usage in high-rate and high-radiation environments such as the ATLAS Inner Tracker at the High-Luminosity Large Hadron Collider (HL-LHC). Both chips are read out using a column-drain readout architecture. LF-Monopix1 follows a design with large charge collection electrode where readout electronics are placed inside. Generally, this offers a homogeneous electrical field in the sensor and short drift distances. TJ-Monopix1 employs a small charge collection electrode with readout electronics separated from the electrode and an additional n-type implant to achieve full depletion of the sensitive volume. This approach offers a low sensor capacitance and therefore low noise and is typically implemented with small pixel size. Both detectors have been characterized before and after irradiation using lab tests and particle beams.

physics.ins-det↗

arXiv2020

BDAQ53, a versatile pixel detector readout and test system for the ATLAS and CMS HL-LHC upgrades

BDAQ53 is a readout system and verification framework for hybrid pixel detector readout chips of the RD53 family. These chips are designed for the upgrade of the inner tracking detectors of the ATLAS and CMS experiments. BDAQ53 is used in applications where versatility and rapid customization are required, such as in laboratory testing environments, test beam campaigns, and permanent setups for quality control measurements. It consists of custom and commercial hardware, a Python-based software framework, and FPGA firmware. BDAQ53 is developed as open source software with both software and firmware being hosted in a public repository.

physics.ins-det↗

arXiv2019

The Monopix chips: Depleted monolithic active pixel sensors with a column-drain read-out architecture for the ATLAS Inner Tracker upgrade

Two different depleted monolithic CMOS active pixel sensor (DMAPS) prototypes with a fully synchronous column-drain read-out architecture were designed and tested: LF-Monopix and TJ-Monopix. These chips are part of a R&D effort towards a suitable implementation of a CMOS DMAPS for the HL-LHC ATLAS Inner Tracker. LF-Monopix was developed using a 150nm CMOS process on a highly resistive substrate (>2 k$Ω\,$cm), while TJ-Monopix was fabricated using a modified 180 nm CMOS process with a 1 k$Ω\,$cm epi-layer for depletion. The chips differ in their front-end design, biasing scheme, pixel pitch, dimensions of the collecting electrode relative to the pixel size (large and small electrode design, respectively) and the placement of read-out electronics within such electrode. Both chips were operational after thinning down to 100 $\mathrmμ$m and additional back-side processing in LF-Monopix for total bulk depletion. The results in this work include measurements of their leakage current, noise, threshold dispersion, response to minimum ionizing particles and efficiency in test beam campaigns. In addition, the outcome from measurements after irradiation with neutrons up to a dose of $1\times10^{15}\,\mathrm{n_{eq} / cm}^{2}$ and its implications for future designs are discussed.

physics.ins-det↗

arXiv2018

Pixel Detectors ... where do we stand?

Pixel detectors have been the working horse for high resolution, high rate and radiation particle tracking for the past 20 years. The field has spun off into imaging applications with equal uniqueness. Now the move is towards larger integration and fully monolithic devices with to be expected spin-off into imaging again. Many judices and prejudices that were around at times were overcome and surpassed. This paper attempts to give an account of the developments following a line of early prejudices and later insights.

physics.ins-det↗

arXiv2018

Depleted Fully Monolithic Active CMOS Pixel Sensors (DMAPS) in High Resistivity 150~nm Technology for LHC

Depleted monolithic CMOS active pixel sensors (DMAPS) have been developed in order to demonstrate their suitability as pixel detectors in the outer layers of a toroidal LHC apparatus inner tracker (ATLAS ITk) pixel detector in the high-luminosity large hadron collider (HL-LHC). Two prototypes have been fabricated using 150 nm CMOS technology on high resistivity (> 2 k$Ω$ $cm^2$) wafers. The chip size is equivalent to that of the current ATLAS pixel detector readout chip. One of the prototypes is used for detailed characterization of the sensor and the analog readout of the DMAPS. The other is a fully monolithic DMAPS including fast readout digital logic that handles the required hit rate. In order to yield a strong homogeneous electric field within the sensor volume, thinning of the wafer was tested. The prototypes were irradiated with X-ray up to a total ionization dose (TID) of 50 Mrad and with neutrons up to non-ionizing energy loss (NIEL) of $10^{15}$ $n_{eq}/cm^2$. The analog readout circuitry maintained its performance after TID irradiation, and the hit-efficiency at > $10^7$ noise occupancy was as high as 98.9 % after NIEL irradiation.

physics.ins-det↗

arXiv2018

A review of advances in pixel detectors for experiments with high rate and radiation

The Large Hadron Collider (LHC) experiments ATLAS and CMS have established hybrid pixel detectors as the instrument of choice for particle tracking and vertexing in high rate and radiation environments, as they operate close to the LHC interaction points. With the High Luminosity-LHC upgrade now in sight, for which the tracking detectors will be completely replaced, new generations of pixel detectors are being devised. They have to address enormous challenges in terms of data throughput and radiation levels, ionizing and non-ionizing, that harm the sensing and readout parts of pixel detectors alike. Advances in microelectronics and microprocessing technologies now enable large scale detector designs with unprecedented performance in measurement precision (space and time), radiation hard sensors and readout chips, hybridization techniques, lightweight supports, and fully monolithic approaches to meet these challenges. This paper reviews the world-wide effort on these developments.

physics.ins-det↗

arXiv2017

Development of depleted monolithic pixel sensors in 150 nm CMOS technology for the ATLAS Inner Tracker upgrade

This work presents a depleted monolithic active pixel sensor (DMAPS) prototype manufactured in the LFoundry 150 nm CMOS process. The described device, named LF-Monopix, was designed as a proof of concept of a fully monolithic sensor capable of operating in the environment of outer layers of the ATLAS Inner Tracker upgrade for the High Luminosity Large Hadron Collider (HL-LHC). Implementing such a device in the detector module will result in a lower production cost and lower material budget compared to the presently used hybrid designs. In this paper the chip architecture will be described followed by the simulation and measurement results.

physics.ins-det↗

arXiv2017

Neutron irradiation test of depleted CMOS pixel detector prototypes

Charge collection properties of depleted CMOS pixel detector prototypes produced on p-type substrate of 2 k$Ω$cm initial resistivity (by LFoundry 150 nm process) were studied using Edge-TCT method before and after neutron irradiation. The test structures were produced for investigation of CMOS technology in tracking detectors for experiments at HL-LHC upgrade. Measurements were made with passive detector structures in which current pulses induced on charge collecting electrodes could be directly observed. Thickness of depleted layer was estimated and studied as function of neutron irradiation fluence. An increase of depletion thickness was observed after first two irradiation steps to 1$\cdot$10$^{13}$ n/cm$^{2}$ and 5$\cdot$10$^{13}$ n/cm$^{2}$ and attributed to initial acceptor removal. At higher fluences the depletion thickness at given voltage decreases with increasing fluence because of radiation induced defects contributing to the effective space charge concentration. The behaviour is consistent with that of high resistivity silicon used for standard particle detectors. The measured thickness of the depleted layer after irradiation with 1$\cdot$10$^{15}$ n/cm$^{2}$ is more than 50 $μ$m at 100 V bias. This is sufficient to guarantee satisfactory signal/noise performance on outer layers of pixel trackers in HL-LHC experiments.

physics.ins-det↗

arXiv2016

Characterization of Fully Depleted CMOS Active Pixel Sensors on High Resistivity Substrates for Use in a High Radiation Environment

Depleted CMOS active sensors (DMAPS) are being developed for high-energy particle physics experiments in high radiation environments, such as in the ATLAS High Luminosity Large Hadron Collider (HL-LHC). Since charge collection by drift is mandatory for harsh radiation environment, the application of high bias voltage to high resistive sensor material is needed. In this work, a prototype of a DMAPS was fabricated in a 150nm CMOS process on a substrate with a resistivity of >2 kΩcm that was thinned to 100 μm. Full depletion occurs around 20V, which is far below the breakdown voltage of 110 V. A readout chip has been attached for fast triggered readout. Presented prototype also uses a concept of sub-pixel en/decoding three pixels of the prototype chip are readout by one pixel of the readout chip. Since radiation tolerance is one of the largest concerns in DMAPS, the CCPD_LF chip has been irradiated with X-rays and neutrons up to a total ionization dose of 50 Mrad and a fluence of 10E15neq/cm2, respectively.

physics.ins-det↗

arXiv2016

Prototype Active Silicon Sensor in 150 nm HR-CMOS Technology for ATLAS Inner Detector Upgrade

The LHC Phase-II upgrade will lead to a significant increase in luminosity, which in turn will bring new challenges for the operation of inner tracking detectors. A possible solution is to use active silicon sensors, taking advantage of commercial CMOS technologies. Currently ATLAS R&D programme is qualifying a few commercial technologies in terms of suitability for this task. In this paper a prototype designed in one of them (LFoundry 150 nm process) will be discussed. The chip architecture will be described, including different pixel types incorporated into the design, followed by simulation and measurement results.

physics.ins-det↗

arXiv2015

From Hybrid to CMOS Pixels ... a possibility for LHC's pixel future?

Hybrid pixel detectors have been invented for the LHC to make tracking and vertexing possible at all in LHC's radiation intense environment. The LHC pixel detectors have meanwhile very successfully fulfilled their promises and R\&D for the planned HL-LHC upgrade is in full swing, targeting even higher ionising doses and non-ionising fluences. In terms of rate and radiation tolerance hybrid pixels are unrivaled. But they have disadvantages as well, most notably material thickness, production complexity, and cost. Meanwhile also active pixel sensors (DEPFET, MAPS) have become real pixel detectors but they would by far not stand the rates and radiation faced from HL-LHC. New MAPS developments, so-called DMAPS (depleted MAPS) which are full CMOS-pixel structures with charge collection in a depleted region have come in the R\&D focus for pixels at high rate/radiation levels. This goal can perhaps be realised exploiting HV technologies, high ohmic substrates and/or SOI based technologies. The paper covers the main ideas and some encouraging results from prototyping R\&D, not hiding the difficulties.

physics.ins-det↗

arXiv2015

A Monolithic active pixel sensor for ionizing radiation using a 180nm HV-SOI process

An improved SOI-MAPS (Silicon On Insulator Monolithic Active Pixel Sensor) for ionizing radiation based on thick-film High Voltage SOI technology (HV-SOI) has been developed. Similar to existing Fully Depleted SOI-based (FD-SOI) MAPS, a buried silicon oxide inter-dielectric (BOX) layer is used to separate the CMOS electronics from the handle wafer which is used as a depleted charge collection layer. FD-SOI MAPS suffer from radiation damage such as transistor threshold voltage shifts due to charge traps in the oxide layers and charge states created at the silicon oxide boundaries (back gate effect). The X-FAB 180-nm HV-SOI technology offers an additional isolation by deep non-depleted implant between the BOX layer and the active circuitry witch mitigates this problem. Therefore we see in this technology a high potential to implement radiation-tolerant MAPS with fast charge collection property. The design and measurement results from a first prototype are presented including charge collection in neutron irradiated samples.

physics.ins-det↗

arXiv2014

A method for precise charge reconstruction with pixel detectors using binary hit information

A method is presented to precisely reconstruct charge spectra with pixel detectors using binary hit information of individual pixels. The method is independent of the charge information provided by the readout circuitry and has a resolution mainly limited by the electronic noise. It relies on the ability to change the detection threshold in small steps while counting hits from a particle source. The errors are addressed and the performance of the method is shown based on measurements with the ATLAS pixel chip FE-I4 bump bonded to a 230 μm 3D-silicon sensor. Charge spectra from radioactive sources and from electron beams are presented serving as examples. It is demonstrated that a charge resolution (σ<200 e) close to the electronic noise of the ATLAS FE-I4 pixel chip can be achieved.

physics.ins-det↗