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Ofer Naaman

Publications and source records attributed to Ofer Naaman.

23 records · Page 2Linked to original sources

Supplementary information for "Quantum supremacy using a programmable superconducting processor"

This is an updated version of supplementary information to accompany "Quantum supremacy using a programmable superconducting processor", an article published in the October 24, 2019 issue of Nature. The main article is freely available at https://www.nature.com/articles/s41586-019-1666-5. Summary of changes since arXiv:1910.11333v1 (submitted 23 Oct 2019): added URL for qFlex source code; added Erratum section; added Figure S41 comparing statistical and total uncertainty for log and linear XEB; new References [1,65]; miscellaneous updates for clarity and style consistency; miscellaneous typographical and formatting corrections.

quant-ph↗

Learning Non-Markovian Quantum Noise from Moiré-Enhanced Swap Spectroscopy with Deep Evolutionary Algorithm

Two-level-system (TLS) defects in amorphous dielectrics are a major source of noise and decoherence in solid-state qubits. Gate-dependent non-Markovian errors caused by TLS-qubit coupling are detrimental to fault-tolerant quantum computation and have not been rigorously treated in the existing literature. In this work, we derive the non-Markovian dynamics between TLS and qubits during a SWAP-like two-qubit gate and the associated average gate fidelity for frequency-tunable Transmon qubits. This gate dependent error model facilitates using qubits as sensors to simultaneously learn practical imperfections in both the qubit's environment and control waveforms. We combine the-state-of-art machine learning algorithm with Moiré-enhanced swap spectroscopy to achieve robust learning using noisy experimental data. Deep neural networks are used to represent the functional map from experimental data to TLS parameters and are trained through an evolutionary algorithm. Our method achieves the highest learning efficiency and robustness against experimental imperfections to-date, representing an important step towards in-situ quantum control optimization over environmental and control defects.

quant-ph↗

A 28nm Bulk-CMOS 4-to-8GHz <2mW Cryogenic Pulse Modulator for Scalable Quantum Computing

Future quantum computing systems will require cryogenic integrated circuits to control and measure millions of qubits. In this paper, we report the design and characterization of a prototype cryogenic CMOS integrated circuit that has been optimized for the control of transmon qubits. The circuit has been integrated into a quantum measurement setup and its performance has been validated through multiple quantum control experiments.

quant-ph↗

Ferromagnetic Josephson junctions for cryogenic memory

Josephson junctions containing ferromagnetic materials have attracted intense interest both because of their unusual physical properties and because they have potential application for cryogenic memory. There are two ways to store information in such a junction: either in the amplitude of the critical current or in the ground-state phase difference across the junction; the latter is the topic of this paper. We have recently demonstrated two different ways to achieve phase control in such junctions: the first uses junctions containing two magnetic layers in a "pseudo spin valve" configuration, while the second uses junctions containing three magnetic layers with non-collinear magnetizations. The demonstration devices, however, have not yet been optimized for use in a large-scale cryogenic memory array. In this paper we outline some of the issues that must be considered to perform such an optimization, and we provide a speculative "phase-diagram" for the nickel-permalloy spin-valve system showing which combinations of ferromagnetic layer thicknesses should produce useful devices.

cond-mat.supr-con↗

An 8-bit carry look-ahead adder with 150 ps latency and sub-microwatt power dissipation at 10 GHz

Reciprocal Quantum Logic combines the speed and power-efficiency of single-flux quantum superconductor devices with design features that are similar to CMOS. We have demonstrated an 8-bit carry look-ahead adder in the technology using combinational gates with fanout of four and non-local interconnect. Measured power dissipation of the fully active circuit is only 510 nW at 6.2GHz. Latency is only 150 ps at a clock rate of 10GHz.

quant-ph↗