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P. Kind

Publications and source records attributed to P. Kind.

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An FPGA-based Data Aggregator for the New ATLAS ITK Pixel DCS

The upcoming ATLAS Phase II upgrade mandates replacing the tracking system with the all-silicon Inner Tracker (ITK), featuring a pixel detector as its core element. The monitoring data of the new system will be aggregated from an on-detector ASIC, Monitoring Of Pixel System (MOPS), and channeled to the Detector Control System (DCS) via a newly developed FPGA-based interface known as MOPS-Hub. The mitigation strategies for addressing potential Single-Event Upset (SEU) issues in the new system, along with the proton irradiation results, are presented.

physics.ins-det

System Integration of ATLAS ITK Pixel DCS ASICs

During the ATLAS phase II upgrade, the tracking system of the ATLAS experiment will be replaced by an all-silicon detector called the inner tracker (ITK) with a pixel detector as the most inner part. The monitoring data of the new system will be aggregated from an on-detector ASIC called Monitoring Of Pixel System (MOPS) and sent to the Detector Control System(DCS) using a new interface called MOPS-HUB. The hardware components of the MOPS-HUB, firmware specifications for the FPGA of MOPS-HUB and its integration plan will be presented. In addition, an irradiation plan for the new system will be introduced.

physics.ins-det

System Tests of the ATLAS Pixel Detector

The innermost part of the ATLAS (A Toroidal LHC ApparatuS) experiment at the LHC (Large Hadron Collider) will be a pixel detector, which is presently under construction. Once installed into the experimental area, access will be extremely limited. To ensure that the integrated detector assembly operates as expected, a fraction of the detector which includes the power supplies and monitoring system, the optical readout, and the pixel modules themselves, has been assembled and operated in a laboratory setting for what we refer to as system tests. Results from these tests are presented.

physics.ins-det

Development of a Detector Control System for the ATLAS Pixel Detector

The innermost part of the ATLAS experiment will be a pixel detector containing around 1750 individual detector modules. A detector control system (DCS) is required to handle thousands of I/O channels with varying characteristics. The main building blocks of the pixel DCS are the cooling system, the power supplies and the thermal interlock system, responsible for the ultimate safety of the pixel sensors. The ATLAS Embedded Local Monitor Board (ELMB), a multi purpose front end I/O system with a CAN interface, is foreseen for several monitoring and control tasks. The Supervisory, Control And Data Acquisition (SCADA) system will use PVSS, a commercial software product chosen for the CERN LHC experiments. We report on the status of the different building blocks of the ATLAS pixel DCS.

physics.ins-det