arXiv subjects
Publications and source records attributed to P. Wittich.
Theia would be a novel, "hybrid" optical neutrino detector, with a rich physics program. This paper is intended to provide a brief overview of the concepts and physics reach of Theia. Full details can be found in the Theia white paper [1].
The challenging conditions of the High-Luminosity LHC require tailored hardware designs for the trigger and data acquisition systems. The Apollo platform features a "Service Module" with a powerful system-on-module computer that provides standard ATCA communications and application-specific "Command Module"s with large FPGAs and high-speed optical fiber links. The CMS version of Apollo will be used for the track finder and the pixel readout. It features up to two large FPGAs and more than 100 optical links with speeds up to 25\,Gb/s. We study carefully the design and performance of the board by using customized firmware to test power consumption, heat dissipation, and optical link integrity. This paper presents the results of these performance tests, design updates, and future plans.
New developments in liquid scintillators, high-efficiency, fast photon detectors, and chromatic photon sorting have opened up the possibility for building a large-scale detector that can discriminate between Cherenkov and scintillation signals. Such a detector could exploit these two distinct signals to observe particle direction and species using Cherenkov light while also having the excellent energy resolution and low threshold of a scintillator detector. Situated in a deep underground laboratory, and utilizing new techniques in computing and reconstruction techniques, such a detector could achieve unprecedented levels of background rejection, thus enabling a rich physics program that would span topics in nuclear, high-energy, and astrophysics, and across a dynamic range from hundreds of keV to many GeV. The scientific program would include observations of low- and high-energy solar neutrinos, determination of neutrino mass ordering and measurement of the neutrino CP violating phase, observations of diffuse supernova neutrinos and neutrinos from a supernova burst, sensitive searches for nucleon decay and, ultimately, a search for NeutrinoLess Double Beta Decay (NLDBD) with sensitivity reaching the normal ordering regime of neutrino mass phase space. This paper describes Theia, a detector design that incorporates these new technologies in a practical and affordable way to accomplish the science goals described above. We consider two scenarios, one in which Theia would reside in a cavern the size and shape of the caverns intended to be excavated for the Deep Underground Neutrino Experiment (DUNE) which we call Theia 25, and a larger 100 ktonne version (Theia 100) that could achieve an even broader and more sensitive scientific program.
The high instantaneous luminosities expected following the upgrade of the Large Hadron Collider (LHC) to the High Luminosity LHC (HL-LHC) pose major experimental challenges for the CMS experiment. A central component to allow efficient operation under these conditions is the reconstruction of charged particle trajectories and their inclusion in the hardware-based trigger system. There are many challenges involved in achieving this: a large input data rate of about 20--40 Tb/s; processing a new batch of input data every 25 ns, each consisting of about 15,000 precise position measurements and rough transverse momentum measurements of particles ("stubs''); performing the pattern recognition on these stubs to find the trajectories; and producing the list of trajectory parameters within 4 $μ\,$s. This paper describes a proposed solution to this problem, specifically, it presents a novel approach to pattern recognition and charged particle trajectory reconstruction using an all-FPGA solution. The results of an end-to-end demonstrator system, based on Xilinx Virtex-7 FPGAs, that meets timing and performance requirements are presented along with a further improved, optimized version of the algorithm together with its corresponding expected performance.
We have developed a novel and generic open-source platform - Apollo - which simplifies the design of custom Advanced Telecommunications Computing Architecture (ATCA) blades by factoring the design into generic infrastructure and application-specific parts. The Apollo "Service Module" provides the required ATCA Intelligent Platform Management Controller, power entry and conditioning, a powerful system-on-module (SoM) computer, and flexible clock and communications infrastructure. The Apollo "Command Module" is customized for each application and typically includes two large field-programmable gate arrays, several hundred optical fiber interfaces operating at speeds up to 28 Gbps, memories, and other supporting infrastructure. The command and service module boards can be operated together or independently on the bench without need for an ATCA shelf.
Interest in many-core architectures applied to real time selections is growing in High Energy Physics (HEP) experiments. In this paper we describe performance measurements of many-core devices when applied to a typical HEP online task: the selection of events based on the trajectories of charged particles. We use as benchmark a scaled-up version of the algorithm used at CDF experiment at Tevatron for online track reconstruction - the SVT algorithm - as a realistic test-case for low-latency trigger systems using new computing architectures for LHC experiment. We examine the complexity/performance trade-off in porting existing serial algorithms to many-core devices. We measure performance of different architectures (Intel Xeon Phi and AMD GPUs, in addition to NVidia GPUs) and different software environments (OpenCL, in addition to NVidia CUDA). Measurements of both data processing and data transfer latency are shown, considering different I/O strategies to/from the many-core devices.
Interest in parallel architectures applied to real time selections is growing in High Energy Physics (HEP) experiments. In this paper we describe performance measurements of Graphic Processing Units (GPUs) and Intel Many Integrated Core architecture (MIC) when applied to a typical HEP online task: the selection of events based on the trajectories of charged particles. We use as benchmark a scaled-up version of the algorithm used at CDF experiment at Tevatron for online track reconstruction - the SVT algorithm - as a realistic test-case for low-latency trigger systems using new computing architectures for LHC experiment. We examine the complexity/performance trade-off in porting existing serial algorithms to many-core devices. Measurements of both data processing and data transfer latency are shown, considering different I/O strategies to/from the parallel devices.
We present the development and validation of a new multivariate $b$ jet identification algorithm ("$b$ tagger") used at the CDF experiment at the Fermilab Tevatron. At collider experiments, $b$ taggers allow one to distinguish particle jets containing $B$ hadrons from other jets. Employing feed-forward neural network architectures, this tagger is unique in its emphasis on using information from individual tracks. This tagger not only contains the usual advantages of a multivariate technique such as maximal use of information in a jet and tunable purity/efficiency operating points, but is also capable of evaluating jets with only a single track. To demonstrate the effectiveness of the tagger, we employ a novel method wherein we calculate the false tag rate and tag efficiency as a function of the placement of a lower threshold on a jet's neural network output value in $Z+1$ jet and $t\bar{t}$ candidate samples, rich in light flavor and $b$ jets, respectively.