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Pablo Antonio Martínez

Publications and source records attributed to Pablo Antonio Martínez.

4 recordsLinked to original sources

Code Detection for Hardware Acceleration Using Large Language Models

Large language models (LLMs) have been massively applied to many tasks, often surpassing state-of-the-art approaches. While their effectiveness in code generation has been extensively studied (e.g., AlphaCode), their potential for code detection remains unexplored. This work presents the first analysis of code detection using LLMs. Our study examines essential kernels, including matrix multiplication, convolution, and fast-fourier transform, implemented in C/C++. We propose both a preliminary, naive prompt and a novel prompting strategy for code detection. Results reveal that conventional prompting achieves great precision but poor accuracy (68.8%, 22.3%, and 79.2% for GEMM, convolution, and FFT, respectively) due to a high number of false positives. Our novel prompting strategy substantially reduces false positives, resulting in excellent overall accuracy (91.1%, 97.9%, and 99.7%, respectively). These results pose a considerable challenge to existing state-of-the-art code detection methods.

cs.SE↗

Matching Linear Algebra and Tensor Code to Specialized Hardware Accelerators

Dedicated tensor accelerators demonstrate the importance of linear algebra in modern applications. Such accelerators have the potential for impressive performance gains, but require programmers to rewrite code using vendor APIs - a barrier to wider scale adoption. Recent work overcomes this by matching and replacing patterns within code, but such approaches are fragile and fail to cope with the diversity of real-world codes. We develop ATC, a compiler that uses program synthesis to map regions of code to specific APIs. The mapping space that ATC explores is combinatorially large, requiring the development of program classification, dynamic analysis, variable constraint generation and lexical distance matching techniques to make it tractable. We apply ATC to real-world tensor and linear algebra codes and evaluate them against four state-of-the-art approaches. We accelerate between 2.6x and 7x more programs, leading to over an order of magnitude performance improvement.

cs.PL↗

POAS: A high-performance scheduling framework for exploiting Accelerator Level Parallelism

Heterogeneous computing is becoming mainstream in all scopes. This new era in computer architecture brings a new paradigm called Accelerator Level Parallelism (ALP). In ALP, accelerators are used concurrently to provide unprecedented levels of performance and energy efficiency. To reach that, there are many problems to be solved, one of the most challenging being co-execution. This paper develops a scheduling framework called POAS, a general method for providing co-execution to generic applications. Unlike other scheduling approaches, POAS does not directly schedule applications. Instead, it is a generic model that transforms any application to make it suitable for co-execution, so that it can be executed in ALP environments. Our proposal is composed of four differentiated steps: predict, optimize, adapt and schedule. During these phases, different modifications are implemented in the application to make it suitable to be executed in ALP environments. In this work we also apply our framework to a matrix multiplication case study, outlining the critical and most important steps to port the application with POAS. We evaluate our POAS-based implementation for matrix multiplication on a CPU/GPU/XPU environment using CPU cores, CUDA cores and tensor cores (XPU). Our experiments prove that co-execution in the studied scenario can benefit from ALP, yielding speedups of up to 45% with respect to using only one accelerator. The proven flexibility and potential of POAS make it an excellent candidate to reach ALP in future computer systems.

cs.DC↗

Using PHAST to port Caffe library: First experiences and lessons learned

Performance has always been a hot topic in computing. However, the viable ways to achieve it have taken many forms in the different moments of computing history. Today, technological limits have pushed the adoption of increasingly parallel multi-core and many-core architectures and even the use of highly specific hardware (aka Domain-Specific Architectures, or DSAs) to solve very specific problems. In this new context, one major problem is how to develop software once, and be able to run it on multiple accelerator architectures, seamlessly. Ideally aiming at a single programming model that can automatically target the code to different kinds of parallel architectures, allowing specific tuning with minimal, if any, changes to the source-code in order to seek performance portability. A comprehensive solution to this is still lacking. In this work, we present the use of the PHAST Library, which allows users to code once, at a high level of abstraction and thus with high productivity, and automatically targeting different parallel devices by changing the compilation process. As a case study, we have worked on the porting of the well-known deep-learning Caffe framework. The framework has been split into different parts and some of them have been ported, obtaining a working straightforward implementation that can be run on both CPUs and GPUs. We conclude discussing the lessons learned during the porting process, and analyzing the obtained performance in the perspective of completing the porting and expanding it to future consequent works.

cs.DC↗