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Paolo Pazzaglia

Publications and source records attributed to Paolo Pazzaglia.

3 recordsLinked to original sources

Comparing Controller Synthesis Methods with Deadline-Miss Awareness

This paper presents a comparative study of real-time controller design methods for dynamical control systems subject to deadline overruns. Numerous techniques have been proposed to handle missed deadlines, i.e., including models or information of possible deadline misses directly in the control design. These approaches substantially differ in their assumptions, supported execution semantics, required runtime information, and provided guarantees, making direct comparison challenging. We address this gap with a qualitative assessment of representative deadline-miss-aware control methods. We analyze the design space of such controllers and identify the critical assumptions on the real-time constraints, the control design criteria and implementation aspects. We expose how these different assumptions lead to the different trade-offs in applicability, and control performance and guarantees. We contribute a comparison tool enabling researchers to systematically benchmark new techniques against the state of the art. The study is supported by simulations on two case studies: a Furuta pendulum and an electric motor to illustrate the practical behavior of the different approaches under missed-deadline conditions.

eess.SY

Stability of Linear Systems under Extended Weakly-Hard Constraints

Control systems can show robustness to many events, like disturbances and model inaccuracies. It is natural to speculate that they are also robust to sporadic deadline misses when implemented as digital tasks on an embedded platform. This paper proposes a comprehensive stability analysis for control systems subject to deadline misses, leveraging a new formulation to describe the patterns experienced by the control task under different handling strategies. Such analysis brings the assessment of control systems robustness to computational problems one step closer to the controller implementation.

math.OC

Optimized Partitioning and Priority Assignment of Real-Time Applications on Heterogeneous Platforms with Hardware Acceleration

Hardware accelerators, such as those based on GPUs and FPGAs, offer an excellent opportunity to efficiently parallelize functionalities. Recently, modern embedded platforms started being equipped with such accelerators, resulting in a compelling choice for emerging, highly computational intensive workloads, like those required by next-generation autonomous driving systems. Alongside the need for computational efficiency, such workloads are commonly characterized by real-time requirements, which need to be satisfied to guarantee the safe and correct behavior of the system. To this end, this paper proposes a holistic framework to help designers partition real-time applications on heterogeneous platforms with hardware accelerators. The proposed model is inspired by a realistic setup of an advanced driving assistance system presented in the WATERS 2019 Challenge by Bosch, further generalized to encompass a broader range of heterogeneous architectures. The resulting analysis is linearized and used to encode an optimization problem that jointly (i) guarantees timing constraints, (ii) finds a suitable task-to-core mapping, (iii) assigns a priority to each task, and (iv) selects which computations to accelerate, seeking for the most convenient trade-off between the smaller worst-case execution time provided by accelerators and synchronization and queuing delays.

cs.DC