arXiv subjects

Patrick Sheridan

Publications and source records attributed to Patrick Sheridan.

5 recordsLinked to original sources

arXiv2026

Quad Length Codes for Lossless Compression of e4m3

Training and serving Large Language Models (LLMs) relies heavily on parallelization and collective operations, which are frequently bottlenecked by network bandwidth. Lossless compression using e.g., Huffman codes can alleviate the issue, however, Huffman codes suffer from slow, bit-sequential decoding and high hardware complexity due to deep tree traversals. Universal codes e.g., Exponential-Golomb codes are faster to decode but do not exploit the symbol frequency distributions. To address these limitations, this paper introduces Quad Length Codes, a hybrid approach designed to balance compression efficiency with decoding speed. The coding scheme uses 3 prefix bits to divide the 256 symbols into 8 areas. Each area has a different code length and encodes a different number of symbols. The scheme uses a Look Up Table with 256 entries, significantly simplifying the hardware implementation compared to Huffman trees. The coding scheme can be adapted for different distributions. For the e4m3 data type, the scheme achieves a compressibility of 13.9% in comparison to 15.9% achieved by Huffman codes, but it significantly speeds up the decoding and simplifies the hardware complexity.

cs.LG↗

arXiv2026

Single-Stage Huffman Encoder for ML Compression

Training and serving Large Language Models (LLMs) require partitioning data across multiple accelerators, where collective operations are frequently bottlenecked by network bandwidth. Lossless compression using Huffman codes is an effective way to alleviate the issue, however, its three-stage design requiring on-the-fly frequency analysis, codebook generation and transmission of codebook along with data introduces computational, latency and data overheads which are prohibitive for latency-sensitive scenarios such as die-to-die communication. This paper proposes a single-stage Huffman encoder that eliminates these overheads by using fixed codebooks derived from the average probability distribution of previous data batches. Through our analysis of the Gemma 2B model, we demonstrate that tensors exhibit high statistical similarity across layers and shards. Using this approach we achieve compression within 0.5% of per-shard Huffman coding and within 1% of the ideal Shannon compressibility, enabling efficient on-the-fly compression.

cs.LG↗

arXiv2014

3D Vertical Dual-Layer Oxide Memristive Devices for Neuromorphic Computing

Dual-layer resistive switching devices with horizontal W electrodes, vertical Pd electrodes and WOx switching layer formed at the sidewall of the horizontal electrodes have been fabricated and characterized. The devices exhibit well-characterized analog switching characteristics and small mismatch in electrical characteristics for devices formed at the two layers. The three-dimensional (3D) vertical device structure allows higher storage density and larger connectivity for neuromorphic computing applications. We show the vertical devices exhibit potentiation and depression characteristics similar to planar devices, and can be programmed independently with no crosstalk between the layers.

cond-mat.other↗

arXiv2013

Stochastic Memristive Devices for Computing and Neuromorphic Applications

Nanoscale resistive switching devices (memristive devices or memristors) have been studied for a number of applications ranging from non-volatile memory, logic to neuromorphic systems. However a major challenge is to address the potentially large variations in space and in time in these nanoscale devices. Here we show that in metal-filament based memristive devices the switching can be fully stochastic. While individual switching events are random, the distribution and probability of switching can be well predicted and controlled. Rather than trying to force high switching probabilities using excessive voltage or time, the inherent stochastic nature of resistive switching allows these binary devices to be used as building blocks for novel error-tolerant computing schemes such as stochastic computing and provide a needed "analog" feature in neuromorphic applications. To verify such potential, we demonstrated memristor-based stochastic bitstreams in both time and space domains, and show that an array of binary memristors can act as a multi-level "analog" device for neuromorphic applications.

cond-mat.other↗

arXiv2012

Complementary Resistive Switching in Tantalum Oxide-Based Resistive Memory Devices

Complementary resistive switches (CRS) are considered as a potential solution for the sneak path problem in large-scale integration of passive crossbar resistive memory arrays. A typical CRS is composed of two bipolar memory cells that are connected anti-serially. Here we report a tantalum-oxide based resistive memory that achieves the complementary switching functionality within a single memory cell. The complementary switching effect is accompanied by switching polarity reversal in different voltage bias regimes. These effects were explained by the redistribution of oxygen vacancies inside the tantalum-oxide layers. The effects of symmetry breaking on bipolar switching and complementary switching were also discussed.

cond-mat.mtrl-sci↗