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Pedro C. Feijoo

Publications and source records attributed to Pedro C. Feijoo.

9 recordsLinked to original sources

Time-Dependent Dielectric Breakdown on Subnanometer EOT nMOS FinFETs

In this paper, the time-dependent dielectric breakdown (TDDB) in sub-1-nm equivalent oxide thickness (EOT) n-type bulk FinFETs is studied. The gate stacks consist of an IMEC clean interfacial layer, atomic layer deposition HfO2 high-k and TiN metal electrode. For the 0.8-nm EOT FinFETs, it is found that TDDB lifetime is consistent with results of planar devices for areas around 1e-8 cm2, implying that the FinFET architecture does not seem to introduce new failure mechanisms. However, for devices with smaller area, the extrapolated voltage at a ten-year lifetime for soft breakdown (SBD) does not meet the specifications, and as a consequence, the SBD path wear-out will have to be included in the final extrapolation. Furthermore, it is shown that for EOTs smaller than 0.8 nm, the TDDB reliability on n-type FinFETs is challenged by the high leakage currents.

cond-mat.mes-hall

Compact modeling technology for the simulation of integrated circuits based on graphene field-effect transistors

In this study, we report the progress made towards the definition of a modular compact modeling technology for graphene field-effect transistors (GFET) that enables the electrical analysis of arbitrary GFET-based integrated circuits. A set of primary models embracing the main physical principles defines the ideal GFET response under DC, transient (time domain), AC (frequency domain), and noise (frequency domain) analysis. Other set of secondary models accounts for the GFET non-idealities, such as extrinsic-, short-channel-, trapping/detrapping-, self-heating-, and non-quasi static-effects, which could have a significant impact under static and/or dynamic operation. At both device and circuit levels, significant consistency is demonstrated between the simulation output and experimental data for relevant operating conditions. Additionally, we provide a perspective of the challenges during the scale up of the GFET modeling technology towards higher technology readiness levels while drawing a collaborative scenario among fabrication technology groups, modeling groups, and circuit designers.

physics.app-ph

An extraction method for mobility degradation and contact resistance of graphene transistors

The intrinsic mobility degradation coefficient, contact resistance and the transconductance parameter of graphene field-effect transistors (GFETs) are extracted for different technologies by considering a novel transport model embracing mobility degradation effects within the charge channel control description. By considering the mobility degradation-based model, a straightforward extraction methodology, not provided before, is enabled by applying the concept of the well-known Y-function to the \textit{I-V} device characteristics. The method works regardless the gate device architecture. An accurate description of experimental data of fabricated devices is achieved with the underlying transport equation by using the extracted parameters. An evaluation of the channel resistance, enabled by the extracted parameters here, has been also provided.

cond-mat.mes-hall

Experimental observation and modeling of the impact of traps on static and analog/HF performance of graphene transistors

The trap-induced hysteresis on the performance of a graphene field-effect transistor is experimentally diminished here by applying consecutive gate-to-source voltage pulses of opposing polarity. This measurement scheme is a practical and suitable approach to obtain reproducible device characteristics. Trap-affected and trap-free experimental data enable a discussion regarding the impact of traps on static and dynamic device performance. An analytical drain current model calibrated with the experimental data enables the study of the traps effects on the channel potential within the device. High-frequency figures of merit and the intrinsic gain of the device obtained from both experimental and synthetic data with and without hysteresis show the importance of considering the generally overlooked impact of traps for analog and high-frequency applications.

cond-mat.mes-hall

The 2D pn Junction Driven Out-of-Equilibrium

The pn junction is a fundamental electrical component in modern electronics and optoelectronics. Currently, there is a great deal of interest in the two-dimensional (2D) pn junction. Although many experiments have demonstrated the working principle, there is a lack of fundamental understanding of its basic properties and expected performances, in particular when the device is driven out of equilibrium. To fill the current gap in understanding, we investigate the electrostatics and electronic transport of 2D lateral pn junctions. To do so we implement a physics-based simulator that selfconsistently solves the 2D Poisson's equation coupled to the drift-diffusion and continuity equations. Notably, the simulator takes into account the strong influence of the out of plane electric field through the surrounding dielectric, capturing the weak screening of charge carriers. Supported by simulations, we propose a Shockley-like equation for the ideal current voltage characteristics, in full analogy to the bulk junction after defining an effective depletion layer (EDL). We also discuss the impact of recombination generation processes inside the EDL, which actually produce a significant deviation with respect to the ideal behavior, consistently with experimental data. Moreover, we analyze the capacitances and conductance of the 2D lateral pn junction. Based on its equivalent circuit we investigate its cut-off frequency targeting RF applications. To gain deeper insight into the role played by material dimensionality, we benchmark the performances of single-layer MoS2 (2D) lateral pn junctions against those of the Si (3D) junction. Finally, a practical discussion on the short length 2D junction case together with the expected impact of interface states has been provided. Given the available list of 2D materials, this work opens the door to a wider exploration of material dependent performances.

physics.app-ph

Contact resistance extraction of graphene FET technologies based on individual device characterization

Straightforward contact resistance extraction methods based on electrical device characteristics are described and applied here to graphene field-effect transistors from different technologies. The methods are an educated adaptation of extraction procedures originally developed for conventional transistors by exploiting the drift-diffusion-like transport in graphene devices under certain bias conditions. In contrast to other available approaches for contact resistance extraction of graphene transistors, the practical methods used here do not require either the fabrication of dedicated test structures or internal device phenomena characterization. The methodologies are evaluated with simulation-based data and applied to fabricated devices. The extracted values are close to the ones obtained with other more intricate methodologies. Bias-dependent contact and channel resistances studies, bias-dependent high-frequency performance studies and contact engineering studies are enhanced and evaluated by the extracted contact resistance values.

physics.app-ph

Radio frequency performance projection and stability trade-off of h-BN encapsulated graphene field-effect transistors

Hexagonal boron nitride (h-BN) encapsulation significantly improves carrier transport in graphene. This work investigates the benefit of implementing the encapsulation technique in graphene field-effect transistors (GFET) in terms of their radio frequency (RF) performance. For such a purpose, a drift-diffusion self-consistent simulator is prepared to get the GFET electrical characteristics. Both the mobility and saturation velocity information are obtained by means of an ensemble Monte Carlo simulator upon considering the relevant scattering mechanisms that affect carrier transport. RF figures of merit are simulated using an accurate small-signal model that includes non-reciprocal capacitances. Results reveal that the cutoff frequency could scale up to the physical limit given by the inverse of the transit time. Projected maximum oscillation frequencies, in the order of few THz, are expected to exceed the values demonstrated by InP and Si based RF transistors. The existing trade-off between power gain and stability and the role played by the gate resistance are also studied. High power gain and stability are feasible even if the device is operated far away from current saturation. Finally, the benefits of device unilateralization and the exploitation of the negative differential resistance region to get negative-resistance gain are discussed.

cond-mat.mes-hall

Scaling of graphene field-effect transistors supported on hexagonal boron nitride: radio-frequency stability as a limiting factor

The quality of graphene in nanodevices has increased hugely thanks to the use of hexagonal boron nitride as a supporting layer. This paper studies to which extent hBN together with channel length scaling can be exploited in graphene field effect transistors (GFETs) to get a competitive radio frequency (RF) performance. Carrier mobility and saturation velocity were obtained from an ensemble Monte Carlo simulator that accounted for the relevant scattering mechanisms (intrinsic phonons, scattering with impurities and defects, etc.). This information is fed into a self consistent simulator, which solves the drift diffusion equation coupled with the two dimensional Poisson's equation to take full account of short channel effects. Simulated GFET characteristics were benchmarked against experimental data from our fabricated devices. Our simulations show that scalability is supposed to bring to RF performance an improvement that is, however, highly limited by instability. Despite the possibility of a lower performance, a careful choice of the bias point can avoid instability. Nevertheless, maximum oscillation frequencies are still achievable in the THz region for channel lengths of a few hundreds of nanometers.

physics.app-ph

Short channel effects in graphene-based field effect transistors targeting radio-frequency applications

Channel length scaling in graphene field effect transistors (GFETs) is key in the pursuit of higher performance in radio frequency electronics for both rigid and flexible substrates. Although two-dimensional (2D) materials provide a superior immunity to Short Channel Effects (SCEs) than bulk materials, they could dominate in scaled GFETs. In this work, we have developed a model that calculates electron and hole transport along the graphene channel in a drift-diffusion basis, while considering the 2D electrostatics. Our model obtains the self-consistent solution of the 2D Poisson's equation coupled to the current continuity equation, the latter embedding an appropriate model for drift velocity saturation. We have studied the role played by the electrostatics and the velocity saturation in GFETs with short channel lengths L. Severe scaling results in a high degradation of GFET output conductance. The extrinsic cutoff frequency follows a 1/L^n scaling trend, where the index n fulfills n < 2. The case n = 2 corresponds to long-channel GFETs with low source/drain series resistance, that is, devices where the channel resistance is controlling the drain current. For high series resistance, n decreases down to n= 1, and it degrades to values of n < 1 because of the SCEs, especially at high drain bias. The model predicts high maximum oscillation frequencies above 1 THz for channel lengths below 100 nm, but, in order to obtain these frequencies, it is very important to minimize the gate series resistance. The model shows very good agreement with experimental current voltage curves obtained from short channel GFETs and also reproduces negative differential resistance, which is due to a reduction of diffusion current.

cond-mat.mes-hall