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Pei-Hao Liou

Publications and source records attributed to Pei-Hao Liou.

3 recordsLinked to original sources

Fault-Tolerant Quantum Error Correction for Constant-Excitation Stabilizer Codes under Coherent Noise

Collective coherent (CC) noise poses challenges for fault-tolerant error correction (FTEC), as it is not captured by conventional stochastic noise models. Constant-excitation (CE) codes are inherently immune to CC errors, but a fault-tolerant framework for operating these codes under circuit-level noise has not yet been established. Here, we develop an FTEC framework for CE CSS codes based on dual-rail concatenation. We show that conventional transversal CNOT gates violate the CE constraint and develop CE-preserving logical CNOT gates together with modified Shor- and Steane-type syndrome extraction schemes using zero-controlled NOT gates and CE-compatible ancilla states. We further develop an extended stabilizer simulation algorithm that tracks both stochastic and CC noise. Using this framework, we identify small distance-3 CE CSS codes demonstrate that the $[[14,1,3]]$ code maintains robust performance under coherent noise. Our results establish a fault-tolerant framework for CE codes under circuit-level noise and demonstrate their potential for quantum processors affected by CC noise.

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Reducing Quantum Error Correction Overhead with Versatile Flag-Sharing Syndrome Extraction Circuits

Given that quantum error correction processes are unreliable, an efficient error syndrome extraction circuit should use fewer ancillary qubits, quantum gates, and measurements, while maintaining low circuit depth, to minimizing the circuit area, roughly defined as the product of circuit depth and the number of physical qubits. We propose to design parallel flagged syndrome extraction with shared flag qubits for quantum stabilizer codes. Versatile parallelization techniques are employed to minimize the required circuit area, thereby improving the error threshold and overall performance. Specifically, all the measurement outcomes in multiple rounds of syndrome extraction are integrated into a lookup table decoder, allowing us to parallelize multiple stabilizer measurements with shared flag qubits. We present flag-sharing and fully parallel schemes for the [[17,1,5]] and [[19,1,5]] Calderbank-Shor-Steane (CSS) codes. This methodology extends to the [[5,1,3]] non-CSS code, achieving the minimum known circuit area. Numerical simulations have demonstrated improved pseudothresholds for these codes by up to an order of magnitude compared to previous schemes in the literature.

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Parallel syndrome extraction with shared flag qubits for Calderbank-Shor-Steane codes of distance three

To perform achieve fault-tolerant quantum computation, one can use flagged syndrome extraction with fewer ancilla qubits. However, it suffers from long circuit depth if one stabilizer is measured at a time. Previously, Reichardt showed that it is possible to measure multiple stabilizers with at most one shared flag qubit for certain small quantum codes. In this paper, we propose a procedure for general Calderbank-Shor-Steane codes of distance three so that multiple $Z$-stabilizers ($X$-stabilizers) can be fault-tolerantly measured in parallel with one shared flag qubit. We simulate the memory and computation pseudo-thresholds for various code schemes. In particular, our parallel scheme based on Shor's nine-qubit code performs better than known seven- and nine-qubit schemes in the literature.

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