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Pierpaolo Valerio

Publications and source records attributed to Pierpaolo Valerio.

6 recordsLinked to original sources

Measurements and analysis of different front-end configurations for monolithic SiGe BiCMOS pixel detectors for HEP applications

This paper presents a small-area monolithic pixel detector ASIC designed in 130 nm SiGe BiCMOS technology for the upgrade of the pre-shower detector of the FASER experiment at CERN. The purpose of this prototype is to study the integration of fast front-end electronics inside the sensitive area of the pixels and to identify the configuration that could satisfy at best the specifications of the experiment. Self-induced noise, instabilities and cross-talk were minimised to cope with the several challenges associated to the integration of pre-amplifiers and discriminators inside the pixels. The methodology used in the characterisation and the design choices will also be described. Two of the variants studied here will be implemented in the pre-production ASIC of the FASER experiment pre-shower for further tests.

physics.ins-det

A massively scalable Time-to-Digital Converter with a PLL-free calibration system in a commercial 130 nm process

A 33.6 ps LSB Time-to-Digital converter was designed in 130 nm BiCMOS technology. The core of the converter is a differential 9-stage ring oscillator, based on a multi-path architecture. A novel version of this design is proposed, along with an analytical model of linearity. The model allowed us to understand the source of the performance superiority (in terms of linearity) of our design and to predict further improvements. The oscillator is integrated in a event-by-event self-calibration system that allows avoiding any PLL-based synchronization. For this reason and for the compactness and simplicity of the architecture, the proposed TDC is suitable for applications in which a large number of converters and a massive parallelization are required such as High-Energy Physics and medical imaging detector systems. A test chip for the TDC has been fabricated and tested. The TDC shows a DNL$\leq$1.3 LSB, an INL$\leq$2 LSB and a single-shot precision of 19.5 ps (0.58 LSB). The chip dissipates a power of 5.4 mW overall.

physics.ins-det

Module concept and thermo-mechanical studies of the silicon-based TT-PET small-animal scanner

The TT-PET collaboration is developing an MRI-compatible small animal PET scanner in which the sensitive element is a monolithic silicon pixel ASIC targeting 30 ps RMS time resolution. The photon-detection technique is based on a stack of alternating layers of high-Z photon converter and 100 $\mathrm{μm}$ silicon sensors, to produce a scanner with 0.5 $\mathrm{\times}$ 0.5 $\mathrm{\times}$ 0.2 $\mathrm{mm^{3}}$ granularity for precise depth-of-interaction measurement. In this paper we present the results of simulation studies for the expected data rate, time-of-flight and spatial resolution, as well as the performance of image reconstruction with and without the use of timing information.

physics.ins-det

Expected performance of the TT-PET scanner

The TT-PET collaboration is developing a small animal TOF-PET scanner based on silicon detectors featuring 30 ps RMS time resolution and intended to be inserted in an existing MRI scanner. The TT-PET scanner makes use of a stack of layers of high-Z photon-converter and 100 $\mathrm{μm}$ thick silicon sensors, to achieve a scanner with 0.5 $\mathrm{\times}$ 0.5 $\mathrm{\times}$ 0.2 $\mathrm{mm^{3}}$ granularity, with precise depth-of-interaction measurement. In this paper we present the results of the Monte Carlo studies for the expected data rate, time resolution on the TOF measurements, spatial resolution and image reconstruction with and without the use of the timing information. Most of the studies have been performed according to the international standards used to assess the performance of small-animal PET system.

physics.med-ph

Characterization of the demonstrator of the fast silicon monolithic ASIC for the TT-PET project

The TT-PET collaboration is developing a small animal TOF-PET scanner based on monolithic silicon pixel sensors in SiGe BiCMOS technology. The demonstrator chip, a small-scale version of the final detector ASIC, consists of a 3 x 10 pixel matrix integrated with the front-end, a 50 ps binning TDC and read out logic. The chip, thinned down to 100 μm and backside metallized, was operated at a voltage of 180 V. The tests on a beam line of minimum ionizing particles show a detection efficiency greater than 99.9 % and a time resolution down to 110 ps.

physics.ins-det

A monolithic ASIC demonstrator for the Thin Time-of-Flight PET scanner

Time-of-flight measurement is an important advancement in PET scanners to improve image reconstruction with a lower delivered radiation dose. This article describes the monolithic ASIC for the TT-PET project, a novel idea for a high-precision PET scanner for small animals. The chip uses a SiGe Bi-CMOS process for timing measurements, integrating a fully-depleted pixel matrix with a low-power BJT-based front-end per channel, integrated on the same 100 $μ m$ thick die. The target timing resolution is 30 ps RMS for electrons from the conversion of 511 keV photons. A novel synchronization scheme using a patent-pending TDC is used to allow the synchronization of 1.6 million channels across almost 2000 different chips at picosecond-level. A full-featured demonstrator chip with a 3x10 matrix of 500x500 $μ m^{2}$ pixels was produced to validate each block. Its design and experimental results are presented here.

physics.ins-det