Pieter Rombouts | Searcharxiv

arXiv2024

A 3.5 GS/s 1-1 MASH VCO ADC With Second-Order Noise Shaping

In this work, a 3.5 GS/s voltage-controlled oscillator (VCO) analog-to-digital converter (ADC) using multi-stage noise shaping (MASH) is presented. This 28nm CMOS ADC achieves second-order noise shaping in an easily-scalable, open-loop configuration. A key enabler of the high-bandwidth MASH VCO ADC is the use of a multi-bit estimated error signal. With an OSR of 16, an SNDR of 67 dB and DR of 68 dB are achieved in 109.375 MHz bandwidth. The full-custom pseudo-analog circuits consume 9 mW, while the automatically generated digital circuits consume another 24 mW. A $\mathbf{FoM_{DR} = 163}$ dB and core area of $\mathbf{0.017\,\mathbf{mm}^2}$ are obtained.

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arXiv2024

A Different View of Sigma-Delta Modulators Under the Lens of Pulse Frequency Modulation

The fact that VCO-ADCs produce noise-shaped quantization noise suggests that a link between frequency modulation and Sigma-Delta modulation should exist. The connection between a VCO-ADC and a first-order Sigma-Delta modulator has been already explained using Pulse Frequency Modulation. In this paper, we attempt to extend the theory based on Pulse Frequency Modulation to a generic Sigma-Delta modulator. We show that this link between Sigma-Delta modulation and Pulse Frequency Modulation relies in a sampling invariance property that defines the equivalence between both entities. This novel point of view, allows to go beyond the white quantization noise model of a Sigma-Delta modulator, revealing the origin of some nonlinear phenomena. We first predict spurious tones which cannot be explained by circuit non linearity. Multi-bit and single bit modulators are shown to belong to a same generic class of systems. Finally, quantizer overload is analyzed using our model. The results are applied to Continuous-Time Sigma-Delta modulators of orders one, two and three and then extended to a generic case.

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