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Quan Guan

Publications and source records attributed to Quan Guan.

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Mitigating Capacitive Loading Enables Fast Two-Qubit Gates in Highly Connected Fluxonium Quantum Processors

Fluxonium qubits combine long coherence times with strong anharmonicity, making them attractive for scalable superconducting quantum processors. Recent experiments have demonstrated high-fidelity two-qubit gates and multi-qubit entanglement in one-dimensional and connectivity-four fluxonium processors, motivating their extension to highly connected two-dimensional (2D) architectures. A central challenge in this extension is to achieve strong coupling to multiple circuit elements while preserving the finite capacitance budget of fluxonium qubits, which constrains the attainable qubit-qubit effective coupling strength and, consequently, two-qubit gate performance. Here, we establish a unified theoretical framework that identifies the connectivity-dependent upper bound on capacitive coupling and quantifies its reduction by distinct parasitic-capacitance channels, applicable across both fluxonium and transmon regimes. We show that pad-to-ground loading is primarily geometry limited and can be substantially suppressed through qubit-pad engineering, whereas inter-pad loading is ultimately constrained by parasitic capacitances of Josephson junctions and Josephson junction arrays. Building on these insights, we formulate practical design principles and numerically demonstrate two-qubit gates as fast as 27 ns and leakage-induced infidelity below $10^{-3}$ under representative fabrication variations in 2D fluxonium architectures. These results establish a quantitative framework for understanding and mitigating capacitive loading, suggesting that it does not impose a fundamental performance limit on highly connected fluxonium processors.

quant-ph

Millikelvin digital-to-analog converter for superconducting quantum processors

Scaling superconducting quantum processors is increasingly constrained by the wiring, heat load, and calibration overhead associated with delivering high-resolution analog signals from room temperature to qubits at millikelvin temperature. Here we demonstrate a superconducting digital-to-analog converter (DAC) integrated with high-coherence fluxonium qubits in a multi-chip module architecture. The DACs generate persistent analog flux signals for tuning qubit parameters and are programmed deterministically using single-flux-quantum (SFQ) pulses, providing a digital interface compatible with established SFQ routing and demultiplexing technologies. Operating at millikelvin temperature, the DACs enable in-situ tuning of fluxonium qubits without measurable degradation of qubit coherence. The presented device provides a static control primitive for flux-tunable qubits, enabling parameter homogenization and eliminating the need for individual room-temperature DC bias lines. These results establish SFQ-programmable millikelvin DACs as a building block for digitally controlled superconducting quantum processors.

quant-ph

Scalable Fluxonium Quantum Processors via Tunable-Coupler Architecture

Superconducting quantum processors have largely converged on transmon-based architectures, while alternative qubit modalities with intrinsic error protection have lacked a demonstrated path to scalable system integration. In particular, although tunable-coupler-mediated interactions have been validated for small fluxonium systems, it remains unclear whether such designs can be scaled to a multi-qubit lattice. Here, we establish a scalable fluxonium processor architecture based on a modular qubit-coupler unit cell engineered to suppress residual interactions and spectator errors in a many-qubit lattice. The system enables parallel single-qubit gate fidelities approaching 99.99% and two-qubit CZ gate fidelities around 99%. With an optimized gate duration of 32 ns, the best CZ gate fidelity reaches 99.9%. We further validate this architecture in a 22-qubit processor based on the same configuration, where parallel operations enable the deterministic generation of Greenberger-Horne-Zeilinger states involving up to 10 qubits. Together, these results demonstrate that the fluxonium-tunable-coupler unit cell composes without emergent interaction pathologies and establish fluxonium as a scalable superconducting qubit platform.

quant-ph

Converting qubit relaxation into erasures with a single fluxonium

Qubits that experience predominantly erasure errors offer distinct advantages for fault-tolerant operation. Indeed, dual-rail encoded erasure qubits in superconducting cavities and transmons have demonstrated high-fidelity operations by converting physical-qubit relaxation into logical-qubit erasures, but this comes at the cost of increased hardware overhead and circuit complexity. Here, we address these limitations by realizing erasure conversion in a single fluxonium operated at zero flux, where the logical state is encoded in its 0-2 subspace. A single, carefully engineered resonator provides both mid-circuit erasure detection and end-of-line (EOL) logical measurement. Post-selection on non-erasure outcomes results in more than four-fold increase of the logical lifetime, from $193~\mu$s to $869~\mu$s. Finally, we characterize measurement-induced logical dephasing as a function of measurement power and frequency, and infer that each erasure check contributes a negligible error of $7.2\times 10^{-5}$. These results establish integer-fluxonium as a promising, resource-efficient platform for erasure-based error mitigation, without requiring additional hardware.

quant-ph