SearcharxivSearch

arXiv subjects

R. Flood

Publications and source records attributed to R. Flood.

4 recordsLinked to original sources

Low temperature laser scanning microscopy of a superconducting radio-frequency cavity

An apparatus was developed to obtain, for the first time, 2D maps of the surface resistance of the inner surface of an operating superconducting radio-frequency niobium cavity by a low-temperature laser scanning microscopy technique. This allows identifying non-uniformities of the surface resistance with a spatial resolution of about one order of magnitude better than with earlier methods and surface resistance resolution of ~ 1 micro-Ohm at 3.3 GHz. A signal-to-noise ratio of about 10 dB was obtained with 240 mW laser power and 1 Hz modulation frequency. The various components of the apparatus, the experimental procedure and results are discussed in detail in this contribution.

cond-mat.supr-con

The Timing Synchronization System at Jefferson Lab

This paper presents the requirements and design of a Timing Synchronization System (TSS) for the Continuous Electron Beam Accelerator Facility (CEBAF) control system at Thomas Jefferson National Accelerator Facility. A clock module has been designed which resides in a VME crate. The clock module can be a communications master or a slave depending on its configuration, which is software and jumper selectable. As a master, the clock module sends out messages in response to an external synchronization signal over a serial fiber optic line. As a slave, it receives the messages and interrupts an associated computer in its VME crate. The application that motivated the development of the TSS, the Accelerator 30 Hz Measurement System, will be described. Operational experience with the TSS will also be discussed.

physics.acc-ph

Versatile Data Acquisition and Controls for Epics Using Vme-Based Fpgas

Field-Programmable Gate Arrays (FPGAs) have provided Thomas Jefferson National Accelerator Facility (Jefferson Lab) with versatile VME-based data acquisition and control interfaces with minimal development times. FPGA designs have been used to interface to VME and provide control logic for numerous systems. The building blocks of these logic designs can be tailored to the individual needs of each system and provide system operators with read-backs and controls via a VME interface to an EPICS based computer. This versatility allows the system developer to choose components and define operating parameters and options that are not readily available commercially. Jefferson Lab has begun developing standard FPGA libraries that result in quick turn around times and inexpensive designs.

cs.AR

A Dual Digital Signal Processor VME Board For Instrumentation And Control Applications

A Dual Digital Signal Processing VME Board was developed for the Continuous Electron Beam Accelerator Facility (CEBAF) Beam Current Monitor (BCM) system at Jefferson Lab. It is a versatile general-purpose digital signal processing board using an open architecture, which allows for adaptation to various applications. The base design uses two independent Texas Instrument (TI) TMS320C6711, which are 900 MFLOPS floating-point digital signal processors (DSP). Applications that require a fixed point DSP can be implemented by replacing the baseline DSP with the pin-for-pin compatible TMS320C6211. The design can be manufactured with a reduced chip set without redesigning the printed circuit board. For example it can be implemented as a single-channel DSP with no analog I/O.

cs.AR