arXiv subjects

R. Mulargia

Publications and source records attributed to R. Mulargia.

5 recordsLinked to original sources

arXiv2025

A two-prong Approach to the Simulation of DC-RSD: TCAD and Spice

The DC-coupled Resistive Silicon Detectors (DCRSD) are the evolution of the AC-coupled RSD (RSD) design, both based on the Low-Gain Avalanche Diode (LGAD) technology. The DC-RSD design concept intends to address a few known issues present in RSDs (e.g., baseline fluctuation, long tail-bipolar signals) while maintaining their advantages (e.g., signal spreading, 100% fill factor). The simulation of DC-RSD presents several unique challenges linked to the complex nature of its design and the large pixel size. The defining feature of DC-RSD, charge sharing over distances that can be as large as a millimeter, represents a formidable challenge for Technology-CAD (TCAD), the standard simulation tool. To circumvent this problem, we have developed a mixed-mode approach to the DC-RSD simulation, which exploits a combination of two simulation tools: TCAD and Spice. Thanks to this hybrid approach, it has been possible to demonstrate that, according to the simulation, the key features of the RSD, excellent timing and spatial resolutions (few tens of picoseconds and few microns), are maintained in the DC-RSD design. In this work, we present the developed models and methodology, mainly showing the results of device-level numerical simulation, which have been obtained with the state-of-the-art Synopsys Sentaurus TCAD suite of tools. Such results will provide all the necessary information for the first batch of DC-RSD produced by Fondazione Bruno Kessler (FBK) foundry in Trento, Italy.

hep-ex↗

arXiv2025

Measurements and TCAD simulations of innovative RSD and DC-RSD LGAD devices for future 4D tracking

This paper summarizes the beam test results obtained with a Resistive Silicon Detector (RSD) (also called AC-Low Gain Avalanche Diode, AC-LGAD) pixel array tested at the DESY beam test facility with a 5 GeV/c electron beam. Furthermore, it describes in detail the simulation results of DC-RSD, an evolution of the RSD design. The simulations campaign described in this paper has been instrumental in the definition of the structures implemented in the Fondazione Bruno Kessler FBK first DC-RSD production. The RSD matrix used in this study is part of the second FBK RSD production, RSD2. The best position resolution reached in this test is sigma_x = 15 micron, about 3.4% of the pitch. DC-RSD LGAD, are an evolution of the AC-coupled design, eliminating the dielectric and using a DC-coupling to the electronics. The concept of DC-RSD has been finalized using full 3D Technology-CAD simulations of the sensor behavior. TCAD simulations are an excellent tool for designing this innovative class of detectors, enabling the evaluation of different technology options (e.g., the resistivity of the n+ layer, contact materials) and geometrical layouts (shape and distance of the read-out pads).

physics.ins-det↗

arXiv2023

Resistive Read-out in Thin Silicon Sensors with Internal Gain

Two design innovations, low-gain avalanche (Low-Gain Avalance Diode, LGAD) and resistive read-out (Resistive Silicon Detector, RSD), have brought strong performance improvements to silicon sensors. Large signals, due to the added gain mechanism, lead to improved temporal precision, while charge sharing, introduced by resistive read-out, allows for achieving excellent spatial resolution even with large pixels. LGAD- and RSD- based silicon sensors are now adopted, or considered, in several future experiments and are the basis for almost every next 4D-trackers. New results obtained with sensors belonging to the second FBK production of RSD (RSD2) demonstrate how a combined resolution of 30 ps and 30 \microns can be obtained with pixels as large as $1 \times 1 $ mm$^2$.

physics.ins-det↗

arXiv2022

High-Precision 4D Tracking with Large Pixels using Thin Resistive Silicon Detectors

The basic principle of operation of silicon sensors with resistive read-out is built-in charge sharing. Resistive Silicon Detectors (RSD, also known as AC-LGAD), exploiting the signals seen on the electrodes surrounding the impact point, achieve excellent space and time resolutions even with very large pixels. In this paper, a TCT system using a 1064 nm picosecond laser is used to characterize sensors from the second RSD production at the Fondazione Bruno Kessler. The paper first introduces the parametrization of the errors in the determination of the position and time coordinates in RSD, then outlines the reconstruction method, and finally presents the results. Three different pixel sizes are used in the analysis: 200 x 340, 450 x 450, and 1300 x 1300 microns^2. At gain = 30, the 450 x 450 microns^2 pixel achieves a time jitter of 20 ps and a spatial resolution of 15 microns concurrently, while the 1300 x 1300 microns^2 pixel achieves 30 ps and 30 micron, respectively. The implementation of cross-shaped electrodes improves considerably the response uniformity over the pixel surface.

physics.ins-det↗

arXiv2017

Beam test results of a 16 ps timing system based on ultra-fast silicon detectors

In this paper we report on the timing resolution of the first production of 50 micro-meter thick Ultra-Fast Silicon Detectors (UFSD) as obtained in a beam test with pions of 180 GeV/c momentum. UFSD are based on the Low-Gain Avalanche Detectors (LGAD) design, employing n-on-p silicon sensors with internal charge multiplication due to the presence of a thin, low-resistivity diffusion layer below the junction. The UFSD used in this test belongs to the first production of thin (50 μm) sensors, with an pad area of 1.4 mm2. The gain was measured to vary between 5 and 70 depending on the bias voltage. The experimental setup included three UFSD and a fast trigger consisting of a quartz bar readout by a SiPM. The timing resolution, determined comparing the time of arrival of the particle in one or more UFSD and the trigger counter, for single UFSD was measured to be 35 ps for a bias voltage of 200 V, and 26 ps for a bias voltage of 240 V, and for the combination of 3 UFSD to be 20 ps for a bias voltage of 200 V, and 15 ps for a bias voltage of 240 V.

physics.ins-det↗