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Reece Robertson

Publications and source records attributed to Reece Robertson.

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Procrustes Tomography -- reconstructing noisy quantum channels made easy

What is the most expensive part of quantum device characterization? Clearly, the answer is quantum process tomography. However, especially for noisy intermediate-scale quantum (NISQ) computers, a comprehensive understanding of the noisy quantum dynamics is essential in interpreting the computational output. In this work, we introduce an efficient method -- Procrustes tomography -- that outperforms established methods in a number of aspects. After a pedagogical and constructive introduction, we demonstrate the utility of the method for representative examples of noisy quantum channels.

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Extending UNIQuE: Quantum Simulation Speedup for the HHL Algorithm

In an extension of the Unconventional Noiseless Intermediate Quantum Emulator, this work introduces a classical emulation of the quantum Harrow-Hassidim-Lloyd algorithm for sampling from the solution space of linear systems. The emulated HHL algorithm scales exponentially with the number of qubits required to represent the linear system, which is an advantage over the state vector simulation of the HHL algorithm, which scales exponentially as a function of both the size of the linear system and the magnitude of its largest (scaled) eigenvalue. We benchmark our emulator by comparing it with the Intel Quantum Simulator and demonstrate a runtime advantage for small linear systems.

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Fault-Tolerant Error Detection Above Break-Even for Multi-Qubit Gates

A fully fault-tolerant implementation of the quantum error-detecting Iceberg $[[2m, 2m-2, 2]]$ code applied to a Toffoli circuit achieved beyond-break-even error detection on a leading trapped-ion quantum computer, where the effect of encoding a circuit with a quantum error-detection code enables increased fidelity compared to an unencoded circuit. This code was also applied to Bell state preparation circuits, where a lean non-fault-tolerant implementation of the Iceberg code enables a fidelity gain as well. This highlights the important point that, at least for small-scale circuits with a substantial portion of error-free runs, it can be effective simply to use error detection to filter out the runs with errors. Furthermore, experiments performed in this work highlight the necessity for judicious compilation of circuits not only for a given hardware but also within a quantum error detection code.

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Variational Gibbs State Preparation on Trapped-Ion Devices

We implement a variational quantum algorithm for Gibbs state preparation of a transverse-field Ising model on IonQ's quantum computers. To this end, we train the variational parameters via classical simulation and perform state tomography on the quantum devices to evaluate the fidelity of the prepared Gibbs state. As a main result, we find that fidelity decreases (non-monotonically) as a function of the inverse temperature $\beta$ of the system. Fidelity also decreases as a function of the size of the system. Interestingly, we find that a Gibbs state prepared for a specified $\beta$ is a better representative of a Gibbs state prepared for a $\textit{lower}$ $\beta$; or in other words, thermal fluctuations in the quantum hardware lead to digital heating, that is, an increase in the temperature of the prepared Gibbs state above what was intended.

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Thermodynamic significance of QUBO encoding on quantum annealers

Quadratic unconstrained binary optimization (QUBO) is the standard interface to quantum annealers, yet a single constrained task admits many QUBO encodings whose penalty choices reshape the energy landscape experienced by hardware. We study a Job Shop Scheduling instance using a two-parameter family of encodings controlled by penalty weights $p_{\rm sum}$ (one-hot/sum constraints) and $p_{\rm pair}$ (precedence constraints). Sweeping $(p_{\rm sum},p_{\rm pair})$, we observe sharp transitions in feasibility and solver success across classical annealing-inspired heuristics and on a D-Wave Advantage processor. Going beyond solution probability, we treat the annealer as an open thermodynamic system and perform cyclic reverse-annealing experiments initialized from thermal samples, measuring the stochastic processor energy change. From the first two moments of this energy change we infer lower bounds on entropy production, work, and exchanged heat via thermodynamic uncertainty relations, and corroborate the observed trends with adiabatic master equation simulations. We find that the same encoding transitions that govern computational hardness also reorganize dissipation: weak penalties generate low-energy infeasible manifolds, while overly strong penalties suppress the effective problem energy scale and increase irreversibility, reducing the thermodynamic efficiency. Our results establish QUBO penalties as thermodynamic control knobs and motivate thermodynamics-aware encoding strategies for noisy intermediate-scale quantum annealers.

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Simon's Period Finding on a Quantum Annealer

Dating to 1994, Simon's period-finding algorithm is among the earliest and most fragile of quantum algorithms. The algorithm's fragility arises from the requirement that, to solve an n qubit problem, one must fault-tolerantly sample O(n) linearly independent values from a solution space. In this paper, we study an adiabatic implementation of Simon's algorithm that requires a constant number of successful samples regardless of problem size. We implement this algorithm on D-Wave hardware and solve problems with up to 298 qubits. We compare the runtime of classical algorithms to the D-Wave solution to analyze any potential advantage.

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Introducing UNIQuE: The Unconventional Noiseless Intermediate Quantum Emulator

We implement the first open-source quantum computing emulator that includes arithmetic operations, the quantum Fourier transform, and quantum phase estimation. The emulator provides significant savings in both temporal and spatial resources compared to simulation, and these computational advantages are verified through comparison to the Intel Quantum Simulator. We also demonstrate how to use the emulator to implement Shor's algorithm and use it to solve a nontrivial factoring problem. This demonstrates that emulation can make quantum computing more accessible than simulation or noisy hardware by allowing researchers to study the behavior of algorithms on large problems in a noiseless environment.

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On the Baltimore Light RailLink into the quantum future

In the current era of noisy intermediate-scale quantum (NISQ) technology, quantum devices present new avenues for addressing complex, real-world challenges including potentially NP-hard optimization problems. Acknowledging the fact that quantum methods underperform classical solvers, the primary goal of our research is to demonstrate how to leverage quantum noise as a computational resource for optimization. This work aims to showcase how the inherent noise in NISQ devices can be leveraged to solve such real-world problems effectively. Utilizing a D-Wave quantum annealer and IonQ's gate-based NISQ computers, we generate and analyze solutions for managing train traffic under stochastic disturbances. Our case study focuses on the Baltimore Light RailLink, which embodies the characteristics of both tramway and railway networks. We explore the feasibility of using NISQ technology to model the stochastic nature of disruptions in these transportation systems. Our research marks the inaugural application of both quantum computing paradigms to tramway and railway rescheduling, highlighting the potential of quantum noise as a beneficial resource in complex optimization scenarios.

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Simon's algorithm in the NISQ cloud

Simon's algorithm was one of the first problems to demonstrate a genuine quantum advantage. The algorithm, however, assumes access to noise-free qubits. In our work we use Simon's algorithm to benchmark the error rates of devices currently available in the "quantum cloud." As a main result we obtain an objective comparison between the different physical platforms made available by IBM and IonQ. Our study highlights the importance of understanding the device architectures and chip topologies when transpiling quantum algorithms onto hardware. For instance, we demonstrate that two-qubit operations on spatially separated qubits on superconducting chips should be avoided.

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