arXiv subjects

Rouhollah Mousavi Iraei

Publications and source records attributed to Rouhollah Mousavi Iraei.

3 recordsLinked to original sources

arXiv2018

Hybrid Piezoelectric-Magnetic Neurons: A Proposal for Energy-Efficient Machine Learning

This paper proposes a spintronic neuron structure composed of a heterostructure of magnets and a piezoelectric with a magnetic tunnel junction (MTJ). The operation of the device is simulated using SPICE models. Simulation results illustrate that the energy dissipation of the proposed neuron compared to that of other spintronic neurons exhibits 70% improvement. Compared to CMOS neurons, the proposed neuron occupies a smaller footprint area and operates using less energy. Owing to its versatility and low-energy operation, the proposed neuron is a promising candidate to be adopted in artificial neural network (ANN) systems.

physics.app-ph↗

arXiv2017

Clocked Magnetostriction-Assisted Spintronic Device Design and Simulation

We propose a heterostructure device comprised of magnets and piezoelectrics that significantly improves the delay and the energy dissipation of an all-spin logic (ASL) device. This paper studies and models the physics of the device, illustrates its operation, and benchmarks its performance using SPICE simulations. We show that the proposed device maintains low voltage operation, non-reciprocity, non-volatility, cascadability, and thermal reliability of the original ASL device. Moreover, by utilizing the deterministic switching of a magnet from the saddle point of the energy profile, the device is more efficient in terms of energy and delay and is robust to thermal fluctuations. The results of simulations show that compared to ASL devices, the proposed device achieves 21x shorter delay and 27x lower energy dissipation per bit for a 32-bit arithmetic-logic unit (ALU).

physics.app-ph↗

arXiv2016

Smart Detector Cell: A Scalable All-Spin Circuit for Low Power Non-Boolean Pattern Recognition

We present a new circuit for non-Boolean recognition of binary images. Employing all-spin logic (ASL) devices, we design logic comparators and non-Boolean decision blocks for compact and efficient computation. By manipulation of fan-in number in different stages of the circuit, the structure can be extended for larger training sets or larger images. Operating based on the mainly similarity idea, the system is capable of constructing a mean image and compare it with a separate input image within a short decision time. Taking advantage of the non-volatility of ASL devices, the proposed circuit is capable of hybrid memory/logic operation. Compared with existing CMOS pattern recognition circuits, this work achieves a smaller footprint, lower power consumption, faster decision time and a lower operational voltage. To the best of our knowledge, this is the first fully spin-based complete pattern recognition circuit demonstrated using spintronic devices.

cs.ET↗