SearcharxivSearch

arXiv subjects

Ruben Garvi

Publications and source records attributed to Ruben Garvi.

3 recordsLinked to original sources

A 399uW 114.3 dB DR Companding Readout ASIC for MEMS Microphones Employing a Multirate Time-Domain ADC

Improvements in the dynamic range and sensitivity of digital MEMS microphones are essential in applications like advanced noise canceling and voice recognition. A cost effective solution to achieve these goals is the companding ADC architecture. Companding ADCs split the dynamic range in several segments with different quantization noise levels, relaxing power constraints. A common problem of companding microphones are audible artifacts generated when the input signal crosses the boundaries between different amplitude segments. We show in this paper a companding ADC architecture that mitigates the boundary artifacts by leveraging the instantaneous and high-resolution time-domain representation of the input signal in a VCO-based ADC. The use of a multi-rate frequency-to-digital converter allows to decouple quantization noise from the VCO frequency, keeping standard audio sampling rates. Co-optimization of the driver and oscillator circuits enables our VCO-ADC to reach \textgreater 112dBc of peak SFDR without a feedback DAC, keeping a Giga-Ohm input impedance compatible with a capacitive MEMS. We show measurements of a 0.13 $\mu$m ASIC implementing a complete readout circuit for a digital MEMS microphone. This includes two analog channels and the digital signal processing and calibration blocks required to deliver a standard single-bit PDM output. This ADC reaches a dynamic range of 114.3dB with a power budget under 400 uW, a Schreier FoM_{SNDR} of 171.0 dB and a FoM_{DR} of 191.3 dB.

eess.AS

Analytical Derivation of Quantization Error in Threshold Level Quantizers Using Bipolar PFM

Uniform quantization is a topic that has been extensively studied. However and although an analytical description of quantization noise has been proposed, most descriptions of the spectral properties of quantization error resort to statistical descriptions. In this paper, we show how the spectrum of a quantized signal can be expressed using pulse frequency modulation. We first establish the equivalence of a uniform quantizer with a system based on the bipolar pulse frequency modulation and we define afterwards the Fourier transform of the quantized signal using pulse frequency modulation properties. This model brings a more intuitive understanding of the spectral structure of quantization noise and complements prior research in the topic. The results of the paper can be directly applied to level crossing ADCs with zero-order-hold interpolators, giving an accurate estimation of their performance.

eess.SP

A Second-Order Audio VCO-ADC with 103-dB-A Dynamic Range and Binary-Weighted Internal Architecture

One of the limitations of conventional VCO-ADCs is the restriction to first-order noise shaping. True-VCO architectures have been proposed to increase the noise-shaping order by cascading several VCO integrators, but without requiring analog feedback loops. A high noise shaping order allows to reduce the input VCO frequency compared to a conventional VCO-ADC with similar dynamic range, which improves power consumption. Prior-art True-VCO architectures represent state variables either with a thermometer code or with a single-bit. Thermometer encoding is a natural choice when ring oscillators are selected as loop filter integrators. However, chip area restrictions force thermometer-encoded state variables to have few levels. A reduced number of levels in the state variables limits the dynamic range of True VCO-ADCs. In this paper, we show experimentally a second-order audio VCO-based ADC which uses ring oscillators as integrators but employs Gray and binary encoding for state variables. As a consequence, the complexity and area of the True-VCO architecture is reduced, breaking the barrier that limits the dynamic range of prior designs. The implemented chip shows a dynamic range of 103~dB achieving a peak SNDR of 76.5 dB-A with a power of 250 $μ$W occupying 0.095 $\text{mm}^2$ in 130 nm CMOS.

eess.SY