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Rupayan Bhattacharjee

Publications and source records attributed to Rupayan Bhattacharjee.

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Assessing the Impact of Low Resolution Control Electronics on Quantum Neural Network Performance

Scaling quantum computers requires tight integration of cryogenic control electronics with quantum processors, where Digital-to-Analog Converters (DACs) face severe power and area constraints. We investigate quantum neural network (QNN) training and inference under finite DAC resolution constraints, evaluating two QNN architectures across four diverse datasets (MNIST, Fashion-MNIST, Iris, Breast Cancer). Pre-trained QNNs achieve accuracy nearly indistinguishable from infinite-precision baselines when deployed on quantum systems with 6-bit DAC control electronics, exhibiting characteristic elbow curves with diminishing returns beyond 3-5 bits depending on the dataset. However, training QNNs directly under quantization constraints reveals gradient deadlock below 12-bit resolution, where parameter updates fall below quantization step sizes, preventing training entirely. We introduce temperature-controlled stochastic quantization that overcomes this limitation through probabilistic parameter updates, enabling successful training at 4-10 bit resolutions. Remarkably, stochastic quantization not only matches but frequently exceeds infinite-precision baseline performance across both architectures and all datasets. Our findings demonstrate that low-resolution control electronics (4-10 bits) need not compromise QML performance while enabling substantial power and area reduction in cryogenic control systems, presenting significant implications for practical quantum hardware scaling and hardware-software co-design of QML systems.

quant-ph

Characterizing Scaling Trends of Post-Compilation Circuit Resources for NISQ-era QML Models

This work investigates the scaling characteristics of post-compilation circuit resources for Quantum Machine Learning (QML) models on connectivity-constrained NISQ processors. We analyze Quantum Kernel Methods and Quantum Neural Networks across processor topologies (linear, ring, grid, star), focusing on SWAP overhead, circuit depth, and two-qubit gate count. Our findings reveal that entangling strategy significantly impacts resource scaling, with circular and shifted circular alternating strategies showing steepest scaling. Ring topology demonstrates slowest resource scaling for most QML models, while Tree Tensor Networks lose their logarithmic depth advantage after compilation. Through fidelity analysis under realistic noise models, we establish quantitative relationships between hardware improvements and maximum reliable qubit counts, providing crucial insights for hardware-aware QML model design across the full-stack architecture.

quant-ph