arXiv subjects

S. van Waasen

Publications and source records attributed to S. van Waasen.

5 recordsLinked to original sources

arXiv2025

Self Clocked Digital LDO for Cryogenic Power Management in 22nm FDSOI with 98 Percent Efficiency

A universal quantum computer~(QC), though promising ground breaking solutions to complex problems, still faces several challenges with respect to scalability. Current state-of-the-art QC use a great quantity of cables to connect the physical qubits, situated in the cryogenic temperature, to room temperature electronics. Integrated cryogenic electronics together with semiconductor spin qubits is one way closer for scalability. Such a scalable quantum computer can have qubits and the control electronics at 4K stage. Being at 4K, more thermal dissipation is allowed without overloading the cooling capability of the fridge. Still, control and power circuitry is expected to be highly efficient. While commercial CMOS technologies are found to be operatable at \qty{}{mK}, lack of reliable cryogenic models while designing, increased mismatches at cryo temperatures makes the design challenging and risky. Using an FDSOI technology with backgate biasing to compensate for the threshold voltage drift happening at cryo~(compensating around 200mV) and digital circuitry is a way to address this challenge. In this work, a self-clocked digital low dropout regulator (DLDO) is designed in FDSOI for high power efficient, variation tolerant regulator to supply cryogenic circuits for Quantum computing. The proposed digital LDO is more resilient to mismatch and having self clocking and close and fine loops addresses the power efficiency and faster transient response.

quant-ph↗

arXiv2025

Scalable 28nm IC implementation of coupled oscillator network featuring tunable topology and complexity

Integrated circuit implementations of coupled oscillator networks have recently gained increased attention. The focus is usually on using these networks for analogue computing, for example for solving computational optimization tasks. For use within analog computing, these networks are run close to critical dynamics. On the other hand, such networks are also used as an analogy of transport networks such as electrical power grids to answer the question of how exactly such critical dynamic states can be avoided. However, simulating large network of coupled oscillators is computationally intensive, with specifc regards to electronic ones. We have developed an integrated circuit using integrated Phase-Locked Loop (PLL) with modifications, that allows to flexibly vary the topology as well as a complexity parameter of the network during operation. The proposed architecture, inspired by the brain, employs a clustered architecture, with each cluster containing 7 PLLs featuring programmable coupling mechanisms. Additionally, the inclusion of a RISC-V processor enables future algorithmic implementations. Thus, we provide a practical alternative for large-scale network simulations both in the field of analog computing and transport network stability research.

cs.ET↗

arXiv2022

First measurement of the surface tension of a liquid scintillator based on Linear Alkylbenzene (HYBLENE 113)

We measured the surface tension of linear alkylbenzene (LAB) HYBLENE 113 mixed with Diphenyloxazole (PPO) as well as of pure LAB HYBLENE 113 as part of material studies for the liquid-scintillator based surround background tagger (SBT) in the proposed SHiP experiment. The measurement was performed using the iron wire method and the surface tension for linear alkyl benzene HYBLENE 113 plus PPO was found to be $(30.0\pm0.6)$ mN/m $22.0\pm 0.5$ °C and for pure HYBLENE 113, $(29.2\pm 0.6)$ mN/m at $21.0\pm 0.5$ °C.

physics.ins-det↗

arXiv2020

Embedded Readout Electronics R&D for the Large PMTs in the JUNO Experiment

Jiangmen Underground neutrino Observatory (JUNO) is a next generation liquid scintillator neutrino experiment under construction phase in South China. Thanks to the anti-neutrinos produced by the nearby nuclear power plants, JUNO will primarily study the neutrino mass hierarchy, one of the open key questions in neutrino physics. One key ingredient for the success of the measurement is to use high speed, high resolution sampling electronics located very close to the detector signal. Linearity in the response of the electronics in another important ingredient for the success of the experiment. During the initial design phase of the electronics, a custom design, with the Front-End and Read-Out electronics located very close to the detector analog signal has been developed and successfully tested. The present paper describes the electronics structure and the first tests performed on the prototypes. The electronics prototypes have been tested and they show good linearity response, with a maximum deviation of 1.3% over the full dynamic range (1-1000 p.e.), fulfilling the JUNO experiment requirements.

physics.ins-det↗

arXiv2013

Characterization of the JUDIDT Readout Electronics for Neutron Detection

The Group for the development of neutron and gamma detectors in the Central Institute of Engineering, Electronics and Analytics (ZEA-2) at Forschungszentrum Juelich (FZJ) has developed, in collaboration with European institutes, an Anger Camera prototype for improving the impact point reconstruction of neutron tracks. The detector is a chamber filled with $^3He+CF_4$ gas for neutron capture and subsequent production of a tritium and a proton. The energy deposition by the ions gives rise to drifting electrons with an avalanche amplification as they approach a micro-strip anode structure. The scintillating light, generated during the electron drift and avalanche stage, is collected by four vacuum photomultipliers. The position reconstruction is performed via software algorithms. The JUDIDT readout electronics was modified at ZEA-2 to cope with the data acquisition requirements of the prototype. The results of the commissioning of the electronics are here presented and commented.

physics.ins-det↗