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Sachin Katti

Publications and source records attributed to Sachin Katti.

21 records · Page 2Linked to original sources

Flashield: a Key-value Cache that Minimizes Writes to Flash

As its price per bit drops, SSD is increasingly becoming the default storage medium for cloud application databases. However, it has not become the preferred storage medium for key-value caches, even though SSD offers more than 10x lower price per bit and sufficient performance compared to DRAM. This is because key-value caches need to frequently insert, update and evict small objects. This causes excessive writes and erasures on flash storage, since flash only supports writes and erasures of large chunks of data. These excessive writes and erasures significantly shorten the lifetime of flash, rendering it impractical to use for key-value caches. We present Flashield, a hybrid key-value cache that uses DRAM as a "filter" to minimize writes to SSD. Flashield performs light-weight machine learning profiling to predict which objects are likely to be read frequently before getting updated; these objects, which are prime candidates to be stored on SSD, are written to SSD in large chunks sequentially. In order to efficiently utilize the cache's available memory, we design a novel in-memory index for the variable-sized objects stored on flash that requires only 4 bytes per object in DRAM. We describe Flashield's design and implementation and, we evaluate it on a real-world cache trace. Compared to state-of-the-art systems that suffer a write amplification of 2.5x or more, Flashield maintains a median write amplification of 0.5x without any loss of hit rate or throughput.

cs.OS↗

Programmable Packet Scheduling

Switches today provide a small set of scheduling algorithms. While we can tweak scheduling parameters, we cannot modify algorithmic logic, or add a completely new algorithm, after the switch has been designed. This paper presents a design for a programmable packet scheduler, which allows scheduling algorithms---potentially algorithms that are unknown today---to be programmed into a switch without requiring hardware redesign. Our design builds on the observation that scheduling algorithms make two decisions: in what order to schedule packets and when to schedule them. Further, in many scheduling algorithms these decisions can be made when packets are enqueued. We leverage this observation to build a programmable scheduler using a single abstraction: the push-in first-out queue (PIFO), a priority queue that maintains the scheduling order and time for such algorithms. We show that a programmable scheduler using PIFOs lets us program a wide variety of scheduling algorithms. We present a detailed hardware design for this scheduler for a 64-port 10 Gbit/s shared-memory switch with <4% chip area overhead on a 16-nm standard-cell library. Our design lets us program many sophisticated algorithms, such as a 5-level hierarchical scheduler with programmable scheduling algorithms at each level.

cs.NI↗

A low-latency control plane for dense cellular networks

In order to keep up with the increasing demands for capacity, cellular networks are becoming increasingly dense and heterogeneous. Dense deployments are expected to provide a linear capacity scaling with the number of small cells deployed due to spatial reuse gains. However in practice network capacity is severely limited in dense networks due to interference. The primary reason is that the current LTE control plane deployment model has very high latency and is unable to cope with the demand of implementing interference management techniques that require coordination on a millisecond timeframe. This paper presents SwiftC, a novel low-latency control plane design for LTE networks. SwiftC's novel contribution is a design for efficiently sending and receiving control plane messages over the LTE spectrum itself, thus creating a direct and low-latency coordination signaling link between small cells and the macrocell. SwiftC builds on recent work in full duplex radios and shows via prototype implementations that a low latency control plane can be built over the existing LTE network without wasting licensed spectrum. We also show the benefits of SwiftC in implementing complex interference management techniques, and show that with SwiftC small cell deployments can achieve almost a linear capacity scaling with every small cell deployed.

cs.NI↗