arXiv subjects

Samuel K. Bartee

Publications and source records attributed to Samuel K. Bartee.

3 recordsLinked to original sources

arXiv2026

Optimal operating temperature for industry-compatible silicon spin quantum computing: colder is not necessarily better

Silicon spin qubits are a leading candidate for large-scale quantum computing owing to their compatibility with semiconductor manufacturing. However, scaling to useful fault-tolerant processors will likely generate thermal loads that exceed the cooling power available at millikelvin temperatures. Raising the operating temperature eases cooling requirements but reduces gate fidelity, increasing the overhead of quantum error correction. Identifying the operating temperature that minimizes total power consumption is therefore a key challenge for commercially viable quantum computers. Here, we use gate set tomography to benchmark two-qubit silicon chips fabricated in both industrial and academic environments over a range of temperatures. Elevated temperatures substantially shorten coherence times and increase gate and state-preparation-and-measurement infidelities. Based on these measurements, we develop a general power model for silicon quantum computers that combines cryogenic cooling requirements with error-correction overheads. We show that a finite optimal operating temperature exists and is strongly influenced by a crossover temperature near 1 K in current devices, above which gate fidelity degrades rapidly. These results connect device-level fidelity limitations to system-level power requirements, providing design guidelines for large-scale silicon quantum computers.

quant-ph↗

arXiv2026

Mid-circuit logic executed in the qubit layer of a quantum processor

Practical quantum computers need to continuously exchange data between classical and quantum subsystems during a computation. Mid-circuit measurements of a qubits state are transferred to the classical electronics layer, and their outcome can inform feedforward operations that close the loop back to the quantum layer. These operations are crucial for fault-tolerant quantum computers, but the quantum-classical loop must be completed before the qubits decohere, presenting a substantial engineering challenge for full-scale systems comprising millions of qubits. Here we perform the first mid-circuit measurements in a system of silicon spin qubits, and show that feedforward operations can be performed without needing to route information to the classical layer. This in-layer approach leverages a backaction-driven control technique that has previously been considered a source of error. We benchmark our in-layer strategy, together with the standard FPGA-enabled approach, and analyse the performance of both methods using gate set tomography. Our results provide the first step towards moving resource-intensive classical processing into the quantum layer, an advance that could solve key engineering challenges, and drastically reduce the power budget of future quantum computers.

quant-ph↗

arXiv2024

Spin Qubits with Scalable milli-kelvin CMOS Control

A key virtue of spin qubits is their sub-micron footprint, enabling a single silicon chip to host the millions of qubits required to execute useful quantum algorithms with error correction. With each physical qubit needing multiple control lines however, a fundamental barrier to scale is the extreme density of connections that bridge quantum devices to their external control and readout hardware. A promising solution is to co-locate the control system proximal to the qubit platform at milli-kelvin temperatures, wired-up via miniaturized interconnects. Even so, heat and crosstalk from closely integrated control have potential to degrade qubit performance, particularly for two-qubit entangling gates based on exchange coupling that are sensitive to electrical noise. Here, we benchmark silicon MOS-style electron spin qubits controlled via heterogeneously-integrated cryo-CMOS circuits with a low enough power density to enable scale-up. Demonstrating that cryo-CMOS can efficiently enable universal logic operations for spin qubits, we go on to show that mill-kelvin control has little impact on the performance of single- and two-qubit gates. Given the complexity of our milli-kelvin CMOS platform, with some 100-thousand transistors, these results open the prospect of scalable control based on the tight packaging of spin qubits with a chiplet style control architecture.

quant-ph↗