arXiv subjects

Satyavolu Papa Rao

Publications and source records attributed to Satyavolu Papa Rao.

5 recordsLinked to original sources

arXiv2026

Characterization of Hydroxyls in Surface Oxide of Superconducting Tantalum and Their Mitigation in Quantum Circuits

Recently, tantalum (Ta) has gained attention in superconducting quantum circuits due to the longer coherence times achieved when replacing niobium (Nb) in capacitor pads. Previous literature shows that surface oxides that form upon ambient exposure on superconducting metals such as Ta, Al, and Nb host two-level system (TLS) defects, which are a leading source of microwave loss and decoherence. While the surface oxides of Nb and Al have been extensively studied, Ta oxides remain less well understood. Using secondary ion mass spectrometry of alpha-Ta films deposited at 300 mm wafer scale, we show for the first time that hydroxyls accumulate in the Ta suboxide region above the underlying Ta. Angle-resolved X-ray photoelectron spectroscopy shows that the surface region is dominated by Ta2O5, with sub-stoichiometric TaOx present in between the Ta2O5 and underlying Ta. The thickness of the tantalum oxide is confirmed by transmission electron microscopy. We demonstrate that [OH] incorporation can be suppressed by replacing the native oxide with an oxide formed during chemical mechanical planarization of alpha-Ta films. Our findings support the hypothesis that TLS defects are non-uniform within the oxide thickness and suggest hydroxyls as a probable molecular origin of these loss channels. Furthermore, we show the feasibility of plasma nitridization as a method to decrease hydroxyl loading on alpha-Ta surfaces. The modulation of hydroxyl content through surface engineering of alpha-Ta can enable the fabrication of more robust, high-coherence superconducting quantum circuits by addressing a potential TLS source.

cond-mat.supr-con↗

arXiv2024

Oxidation Kinetics of Superconducting Niobium and a-Tantalum in Atmosphere at Short and Intermediate Time Scales

The integration of superconducting niobium and tantalum into superconducting quantum devices has been increasingly explored over the past few years. Recent developments have shown that two-level-systems (TLS) in the surface oxides of these superconducting films are a leading source of decoherence in quantum circuits, and understanding the surface oxidation kinetics of these materials is key to enabling scalability of these technologies. We analyze the nature of atmospheric oxidation of both niobium and a-tantalum surfaces at time scales relevant to fabrication, from sub-minute to two-week atmospheric exposure, employing a combination of x-ray photoelectron spectroscopy and transmission electron microscopy to monitor the growth of the surface oxides. The oxidation kinetics are modeled according to the Cabrera-Mott model of surface oxidation, and the model growth parameters are reported for both films. Our results indicate that niobium surface oxidation follows a consistent regime of inverse logarithmic growth for the entire time scale of the study, whereas a-Ta surface oxidation shows a clear transition between two inverse logarithmic growth regimes at time t = 1 hour, associated with the re-coordination of the surface oxide as determined by x-ray photoelectron spectroscopy analysis. Our findings provide a more complete understanding of the differences in atmospheric surface oxidation between Nb and a-Ta, particularly at short time scales, paving the way for the development of more robust fabrication control for quantum computing architectures.

cond-mat.supr-con↗

arXiv2024

Photonics for Sustainable Computing

Photonic integrated circuits are finding use in a variety of applications including optical transceivers, LIDAR, bio-sensing, photonic quantum computing, and Machine Learning (ML). In particular, with the exponentially increasing sizes of ML models, photonics-based accelerators are getting special attention as a sustainable solution because they can perform ML inferences with multiple orders of magnitude higher energy efficiency than CMOS-based accelerators. However, recent studies have shown that hardware manufacturing and infrastructure contribute significantly to the carbon footprint of computing devices, even surpassing the emissions generated during their use. For example, the manufacturing process accounts for 74% of the total carbon emissions from Apple in 2019. This prompts us to ask -- if we consider both the embodied (manufacturing) and operational carbon cost of photonics, is it indeed a viable avenue for a sustainable future? So, in this paper, we build a carbon footprint model for photonic chips and investigate the sustainability of photonics-based accelerators by conducting a case study on ADEPT, a photonics-based accelerator for deep neural network inference. Our analysis shows that photonics can reduce both operational and embodied carbon footprints with its high energy efficiency and at least 4$\times$ less fabrication carbon cost per unit area than 28 nm CMOS.

cs.ET↗

arXiv2020

Optimization of photoluminescence from W centers in silicon-on-insulator

W centers are trigonal defects generated by self-ion implantation in silicon that exhibit photoluminescence at 1.218 $μ$m. We have shown previously that they can be used in waveguide-integrated all-silicon light-emitting diodes (LEDs). Here we optimize the implant energy, fluence and anneal conditions to maximize the photoluminescence intensity for W centers implanted in silicon-on-insulator, a substrate suitable for waveguide-integrated devices. After optimization, we observe near two orders of magnitude improvement in photoluminescence intensity relative to the conditions with the stopping range of the implanted ions at the center of the silicon device layer. The previously demonstrated waveguide-integrated LED used implant conditions with the stopping range at the center of this layer. We further show that such light sources can be manufactured at the 300-mm scale by demonstrating photoluminescence of similar intensity from 300 mm silicon-on-insulator wafers. The luminescence uniformity across the entire wafer is within the measurement error.

physics.app-ph↗

arXiv2016

Revisiting the theory of ferroelectric negative capacitance

In this paper we revisit the theory of negative capacitance, in a (i) standalone ferroelectric, (ii) ferroelectric-dielectric, and (iii) ferroelectric-semiconductor series combination, and show that it is important to minimize the total Gibbs free energy of the combined system (and not just the free energy of the ferroelectric) to obtain the correct states. The theory is explained both analytically and using numerical simulation, for ferroelectric materials with first order and second order phase transitions. The exact conditions for different regimes of operation in terms of hysteresis and gain are derived for ferroelectric-dielectric combination. Finally the ferroelectric-semiconductor series combination is analyzed to gain insights into the possibility of realization of steep slope transistors in a hysteresis free manner.

cond-mat.mes-hall↗