arXiv subjects

Sayani Majumdar

Publications and source records attributed to Sayani Majumdar.

15 recordsLinked to original sources

arXiv2026

An Unsupervised Machine Learning-based Framework for Wafer Scale Variability Analysis and Performance Prediction of Ferroelectric Hf0.5Zr0.5O2 Thin Film Capacitors

Fabrication process-induced performance variability remains a formidable barrier in the high-volume manufacturing of semiconductor chips. With skyrocketing Artificial Intelligence (AI) workload, demand for non-volatile and computational memories is growing exponentially. As embedded non-volatile memory, ferroelectric Hf0.5Zr0.5O2 emerged as a strong candidate due to their CMOS back-end-of-line (BEOL) compatibility, scalability and high performance. However, their sensitive crystallization kinetics leads to significant device-to-device (D2D) non-uniformity leading to unpredictability of performance over wafer scale. In this work, we demonstrate unsupervised machine learning can analyze intra-die D2D variations and predict performance of "unseen" dies efficiently. We present a framework utilizing Principal Component Analysis (PCA) and K-Means clustering to analyze D2D performance variations in HZO capacitors and building on data from multiple dies, we move beyond traditional descriptive statistics to a predictive "Virtual Metrology" approach that separates performance categories, defined by key parameters like remanent polarization (Pr) and coercive voltage (Vc). The analysis further extends to comparing uniformity across different dies across the wafer showing the proposed methodology can accurately predict device performance on untested dies with a low Mean Absolute Percentage Error (MAPE) in the range of 5-10%, suggesting a robust path for accelerated yield improvement and reduced metrology overhead.

cond-mat.mtrl-sci↗

arXiv2025

Record High Polarization at 2V and Imprint-free operation in Superlattice HfO2-ZrO2 by Proper Tuning of Ferro and Antiferroelectricity

Neuromorphic computing, inspired by biological intelligence, offers a pathway to revolutionize artificial intelligence (AI) by unifying memory and processing in an energy-efficient, sustainable framework for data-intensive tasks. Ferroelectric (FE) materials have emerged as promising candidates for implementing artificial synapses, yet achieving low-voltage operation in CMOS back-end compatible devices remains a major challenge. In this work, we demonstrate that proper tuning of ferro and antiferroelectric phases in HfO2-ZrO2(HZO) superlattice based capacitors can lead to imprint-free switching with record switchable polarization (2Pr) of 76 micro Coulomb cm-2 under an external field of only 2 MV cm-1. The sizable remanent polarization of the superlattice HZO further enables linear potentiation and depression with an on to off ratio of 20 within a 3 MV cm-1 bias window. Under pulsed operation, the devices show robust endurance, either maintaining polarization with less than 10 per cent degradation up to 10^8 cycles or surviving beyond 10^9 cycles with recoverable fatigue. By elucidating two distinct fatigue mechanisms, this work highlights strategies for optimizing FE devices to meet the stringent demands of neuromorphic training applications.

cond-mat.mtrl-sci↗

arXiv2025

Task-Aware Tuning of Time Constants in Spiking Neural Networks for Multimodal Classification

Spiking Neural Networks (SNNs) are promising candidates for low-power edge computing in domains such as wearable sensing and time-series analysis. A key neuronal parameter, the leaky time constant (LTC), governs temporal integration of information in Leaky Integrateand-Fire (LIF) neurons, yet its impact on feedforward SNN performance across different data modalities remains underexplored. This study investigates the role of LTC in a temporally adaptive feedforward SNN applied to static image, dynamic image, and biosignal time-series classification. Presented experiments demonstrate that LTCs critically affect inference accuracy, synaptic weight distributions, and firing dynamics. For static and dynamic images, intermediate LTCs yield higher accuracy and compact, centered weight histograms, reflecting stable feature encoding. In time-series tasks, optimal LTCs enhance temporal feature retention and result in broader weight sparsity, allowing for tolerance of LTC variations. The provided results show that inference accuracy peaks at specific LTC ranges, with significant degradation beyond this optimal band due to over-integration or excessive forgetting. Firing rate analysis reveals a strong interplay between LTC, network depth, and energy efficiency, underscoring the importance of balanced spiking activity. These findings reveal that task-specific LTC tuning is essential for efficient spike coding and robust learning. The results provide practical guidelines for hardware-aware SNN optimization and highlight how neuronal time constants can be designed to match task dynamics. This work contributes toward scalable, ultra-lowpower SNN deployment for real-time classification tasks in neuromorphic computing.

cs.NE↗

arXiv2025

Towards Capacitive In-Memory-computing: A perspective on the future of AI hardware

The quest for energy-efficient, scalable neuromorphic computing has elevated compute-in-memory (CIM) architectures to the forefront of hardware innovation. While memristive memories have been extensively explored for synaptic implementation in CIM architectures, their inherent limitations, including static power dissipation, sneak-path currents, and interconnect voltage drops, pose significant challenges for large-scale deployment, particularly at advanced technology nodes. In contrast, capacitive memories offer a compelling alternative by enabling charge-domain computation with virtually zero static power loss, intrinsic immunity to sneak paths, and simplified selector-less crossbar operation, while offering superior compatibility with 3D Back-end-of-Line (BEOL) integration. This perspective highlights the architectural and device-level advantages of emerging non-volatile capacitive synapses. We examine how material engineering and interface control can modulate synaptic behavior, capacitive memory window and multilevel analog storage potential. Furthermore, we explore critical system-level trade-offs involving device-to-device variation, charge transfer noise, dynamic range, and effective analog resolution.

cond-mat.mtrl-sci↗

arXiv2024

Towards Improved Polarization Uniformity in Ferroelectric Hf$_{0.5}$Zr$_{0.5}$O$_2$ Devices within Back End of Line Thermal Budget for Memory and Neuromorphic Applications

Thin film ferroelectric devices with ultralow power operation, non-volatile data retention and fast and reliable switching are attractive for non-volatile memory and as synaptic weight elements. However, low thermal budget ferroelectric oxides suffer from crystalline inhomogeneity and defects that makes their large-scale circuit integration challenging. Here, we report on the thermally engineered way to induce wafer-scale homogeneity in Hf$_{0.5}$Zr$_{0.5}$O$_2$ capacitors that can lead to high device reliability making their integration possible in ultralow power memory and neuromorphic computing hardware.

physics.app-ph↗

arXiv2024

Universal Model for Ferroelectric Capacitors Operating Down to Deep Cryogenic Temperatures

Binary oxide ferroelectrics like doped HfO2, compatible with complementary metal-oxide-semiconductor (CMOS) platforms, have gained significant interest for energy efficient, scalable, high-performance non-volatile memory and neuromorphic technologies. However, there is a gap in models for doped hafnia systems that can explain physical properties while being circuit simulation compatible and computationally efficient. We present a universal model based on the Jiles-Atherton equations to reproduce experimentally measured polarization switching in ferroelectric thin film capacitors under different electric field and temperature conditions. Additionally, device-to-device variation effect on the model parameters is presented, which will enable large-scale integration of the FE components to complex functional circuits. Due to increased interest in cryogenic electronics for quantum computing and space technologies, effect of temperatures on polarization switching is investigated down to 4 K. We show our model can reproduce the experimental polarization-voltage relation of Hafnium Zirconium Oxide (HZO) capacitors with nearly 100 % accuracy, for different electric fields and temperatures down to 4 K, including analog switching. We find cooling the devices below 100 K increases polarization update linearity and symmetry significantly. Our results represent an important advancement towards application of ferroelectric HZO capacitors for large-scale memory and neuromorphic circuits operating down to deep cryogenic temperatures.

cond-mat.mtrl-sci↗

arXiv2024

Designing high endurance Hf0.5Zr0.5O2 capacitors through engineered recovery from fatigue for non-volatile ferroelectric memory and neuromorphic hardware

Heavy computational demands from artificial intelligence (AI) leads the research community to explore the design space for functional materials that can be used for high performance memory and neuromorphic computing hardware. Novel device technologies with specially engineered properties are under intense investigation to revolutionize information processing with brain-inspired computing primitives for ultra energy-efficient implementation of AI and machine learning tasks. Ferroelectric memories with ultra-low power and fast operation, non-volatile data retention and reliable switching to multiple polarization states promises one such option for non-volatile memory and synaptic weight elements in neuromorphic hardware. For quick adaptation of industry, new materials need complementary metal oxide semiconductor (CMOS) process compatibility which brings a whole new set of challenges and opportunities for advanced materials design. In this work, we report on designing of back-end-of-line compatible ferroelectric Hf0.5Zr0.5O2 capacitors that are capable of recovery from fatigue multiple times reaching 2Pr > 40 microC cm-2 upon each retrieval. Our results indicate that with specifically engineered material stack and annealing protocols, it is possible to reach endurance exceeding 10^9 cycles at room temperature that can lead to ultralow power ferroelectric non-volatile memory components or synaptic weight elements compatible with online training or inference tasks for neuromorphic computing.

cond-mat.mtrl-sci↗

arXiv2023

Back-end and Flexible Substrate Compatible Analog Ferroelectric Field Effect Transistors for Accurate Online Training in Deep Neural Network Accelerators

Online training of deep neural networks (DNN) can be significantly accelerated by performing in-situ vector matrix multiplication in a crossbar array of analog memories. However, training accuracies often suffer due to device non-idealities such as nonlinearity, asymmetry, limited bit precision and dynamic weight update range within constrained power budget. Here, we report a three-terminal Ferroelectric-Field-Effect-Transistor based on low thermal budget processes that can work efficiently as an analog synaptic transistor. Ferroelectric polymer P(VDF-TrFE) as the gate insulator and 2D semiconductor MoS2 as the n-type semiconducting channel material makes them suitable for flexible and wearable substrate integration. The analog conductance of the FeFETs can be precisely manipulated by employing a ferroelectric-dielectric layer as the gate stack. The ferroelectric-only devices show excellent performance as digital non-volatile memory operating at +-5V while the hybrid ferroelectric-dielectric devices show quasi-continuous resistive switching resulting from gradual ferroelectric domain rotation, important for their multibit operation. Analog conductance states of the hybrid devices allow linearity and symmetry of weight updates and produce a dynamic conductance range of 104 with >16 reproducible conducting states. Network training experiments of these FeFETs show >96% classification accuracy with MNIST handwritten datasets highlighting their potential for implementation in scaled DNN architectures.

cond-mat.mtrl-sci↗

arXiv2022

Efficient Deep Neural Network Accelerator Using Controlled Ferroelectric Domain Dynamics

The current work reports an efficient deep neural network (DNN) accelerator where synaptic weight elements are controlled by ferroelectric domain dynamics. An integrated device-to-algorithm framework for benchmarking novel synaptic devices is used. In P(VDF-TrFE) based ferroelectric tunnel junctions, analog conductance states are measured using a custom pulsing protocol and associated custom circuits and array architectures for DNN training is simulated. Our results show precise control of polarization switching dynamics in multi-domain, polycrystalline ferroelectric thin films can produce considerable weight update linearity in metal-ferroelectric-semiconductor (MFS) tunnel junctions. Ultrafast switching and low junction current in these devices offer extremely energy efficient operation. Through an integrated platform of hardware development, characterization and modelling, we predict the available conductance range where linearity is expected under identical potentiating and depressing pulses for efficient DNN training and inference tasks. As an example, an analog crossbar based DNN accelerator with MFS junctions as synaptic weight elements showed ~ 93% training accuracy on large MNIST handwritten digit dataset while for cropped images, a 95% accuracy is achieved. One observed challenge is rather limited dynamic conductance range while operating under identical potentiating and depressing pulses below 1V. Investigation is underway for improving the dynamic conductance range without losing the weight update linearity.

cs.ET↗

arXiv2022

Scalable, Highly Crystalline, 2D Semiconductor Atomic Layer Deposition Process for High Performance Electronic Applications

This work demonstrates a large area process for atomically thin 2D semiconductors to unlock the technological upscale required for their commercial uptake. The new atomic layer deposition (ALD) and conversion technique yields large area performance uniformity and tunability. Like graphene, 2D Transition Metal Dichalcogenides (TMDCs) are prone to upscaling challenges limiting their commercial uptake. They are challenging to grow uniformly on large substrates and to transfer on alternative substrates while they often lack in large area electrical performance uniformity. The scalable ALD process of this work enables uniform growth of 2D TMDCs on large area with independent control of layer thickness, stoichiometry and crystallinity while allowing chemical free transfers to application substrates. Field effect transistors (FETs) fabricated on flexible substrates using the process present a field effect mobility of up to 55 cm^2/Vs, subthreshold slope down to 80 mV/dec and on/off ratios of 10^7. Additionally, non-volatile memory transistors using ferroelectric FETs (FeFETs) operating at +-5 V with on/off ratio of 107 and a memory window of 3.25 V are demonstrated. These FeFETs demonstrate state-of-the-art performance with multiple state switching, suitable for one-transistor non-volatile memory and for synaptic transistors revealing the applicability of the process to flexible neuromorphic applications.

physics.app-ph↗

arXiv2009

Correlation between Organic Magnetoresistance (OMAR) and Ferromagnetic ordering

We report observation of ferromagnetic (FM) ordering in organic semiconductors, namely regio-regular poly (3-hexyl thiophene) (RRP3HT) and 1-(3-methoxycarbonyl)propyl-1-phenyl-[6,6]-methanofullerene (PCBM), in the temperature range of 5-300 K in addition to magnetoresistance (OMAR) observed in the diodes made from the same materials. Particle induced x-ray emission spectroscopy confirms the presence of dilute magnetic impurities in the materials mainly as residues from the synthesis process. However, upon blending these two materials with FM signal, the FM ordering is suppressed by a huge paramagnetic (PM) signal indicating ground state charge transfer formation in the blend. Together with the magneto-transport studies, these results indicate that OMAR response is observed in a device only when the corresponding active materials are FM. In the diodes with P3HT:PCBM complex, that as a blend shows PM response, OMAR vanishes almost completely. We propose that ferromagnetism in the active material can have important correlation with the OMAR response in the diodes.

cond-mat.mtrl-sci↗

arXiv2009

Hysteretic magnetoresistance in polymeric diodes

We report on hysteretic organic magnetoresistance (OMAR) in polymeric diodes. We found that magnitude and lineshape of OMAR depends strongly on the scan speed of the magnetic field and on the time delay between two successive measurements. The time-dependent OMAR phenomenon is universal for diodes made with various polymers. However, the width and magnitude of OMAR varied with the polymeric material. The suggestive reason for this hysteretic behavior are trapped carriers, which in presence of a magnetic field changes the ferromagnetic ground-state of the polymer leading to long spin relaxation time. These experimental observations are significant for clarification of the OMAR phenomenon.

cond-mat.mtrl-sci↗

arXiv2008

Towards printed magnetic sensors based on organic diodes

We report the study of magnetotransport properties of regio-regular poly (3-hexyl thiophene) based organic diodes. The devices were fabricated using two different techniques of spin coating and inkjet printing. Positive magnetoresistance (MR) effect was observed at room temperature in all the devices. The highest MR magnitude reached up to 16% for some spin-coated devices and up to 10% in inkjet printed devices. The MR magnitude and line shapes were found to depend strongly on the measuring current. We observed deviation from the theoretically predicted Lorentzian or non-Lorentzian line shape of the MR traces, which is discussed in detail in the article. Although, the printed devices exhibit MR response as high as for the spin coated ones, they still need to be optimized in terms of performance and yield for large scale applications as magnetic sensors.

cond-mat.mtrl-sci↗

arXiv2008

The role of electron-hole recombination in organic magnetoresistance

Magneto-electrical measurements were performed on diodes and bulk heterojunction solar cells (BHSCs) to clarify the role of formation of coulombically bound electron-hole (e-h) pairs on the magnetoresistance (MR) response in organic thin film devices. BHSCs are suitable model systems because they effectively quench excitons but the probability of forming e-h pairs in them can be tuned over orders of magnitude by the choice of material and solvent in the blend. We have systematically varied the e-h recombination coefficients, which are directly proportional to the probability for the charge carriers to meet in space, and found that a reduced probability of electrons and holes meeting in space lead to disappearance of the MR. Our results clearly show that MR is a direct consequence of e-h pair formation. We also found that the MR line shape follows a power law-dependence of B0.5 at higher fields.

cond-mat.mtrl-sci↗

arXiv2005

A room-temperature polymeric spin-valve

We report giant magnetoresistance up to 150 percent at low bias current and low temperature as well as room temperature magnetoresistance in polymeric spin-valves having the structure LSMO/conjugated polymer/Co. The conjugated polymers, regiorandom and regioregular P3HT were used as the spacer materials. We observed an asymmetric bias voltage dependence of different devices and additional, hitherto unseen, peaks in MR vs. magnetic field plot with low bias currents measurements that we attribute to local magnetic moments due to spin-trapping in the defects in the spacer material. Also, various spacer thicknesses led to variation of magnetoresistance within a certain temperature range.

cond-mat.mtrl-sci↗