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Shubham Chouhan

Publications and source records attributed to Shubham Chouhan.

2 recordsLinked to original sources

Engineering a Phase-Noise-Based Quantum Random Number Generator for Real-Time Secure Applications: Design, Validation, and Scalability

Random Number Generators (RNGs) are crucial for applications ranging from cryptography to simulations. Depending on the source of randomness, RNGs are classified into Pseudo-Random Number Generators (PRNGs), True Random Number Generators (TRNGs), and Quantum Random Number Generators (QRNGs). This work presents the end-to-end development of a high-speed, high-efficiency, phase-noise-based QRNG system that taps into the quantum phase noise of a single-frequency laser, with randomness originating from spontaneous emission. Using a self-heterodyne measurement with a semiconductor laser (linewidth $\approx$ 5.23 $GHz$) operated near threshold and a $\sim$48 $cm$ fiber delay line, a raw data generation rate of 2.0 $Gbps$ is achieved. To ensure uniform randomness in the QRNG output, robust extraction techniques developed in-house, such as the Toeplitz Strong Extractor (TSE), are used. Randomness validation using the NIST and Diehard test suites confirms that all statistical tests pass at standard confidence levels. The developed system achieves a post-processed generation rate of 1.0 $Gbps$ in operation and attains a Technology Readiness Level (TRL) of 7, approaching TRL 8, making it suitable for real-time secure applications such as cryptographic key generation and stochastic modeling.

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FPGA-based Toeplitz Strong Extractor for Quantum Random Number Generators

Quantum Random Number Generators (QRNGs) serve as high-entropy sources for Quantum Key Distribution (QKD) systems. However, the raw data from these quantum sources require post-processing to achieve a nearly uniform distribution. This work presents a state-of-the-art implementation of the Toeplitz Strong Extractor on an FPGA, achieving a benchmark extraction speed of 26.57 Gbps. A detailed implementation flow of the post-processing on the FPGA is provided, along with the execution speeds obtained for different randomness extraction ratios. Raw data from an in-house phase noise-based QRNG is processed on the FPGA using this implementation, and the output is validated using the NIST STS 2.1.2 statistical randomness test suite.

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