arXiv subjects

Sinan Inel

Publications and source records attributed to Sinan Inel.

4 recordsLinked to original sources

arXiv2026

Mitigating crosstalk errors for simultaneous single-qubit gates on a superconducting quantum processor

Single-qubit gates on superconducting quantum processors are typically implemented using microwave pulses applied through dedicated control lines. However, these microwave pulses may also drive other qubits due to crosstalk arising from capacitive coupling and wavefunction overlap in systems with closely spaced transition frequencies. Crosstalk and frequency crowding increase errors during simultaneous single-qubit operations relative to isolated gates, thus forming a major bottleneck for scaling superconducting quantum processors. In this work, we combine model-based qubit frequency optimization with pulse shaping to demonstrate crosstalk error mitigation in single-qubit gates on a 49-qubit superconducting quantum processor. We introduce and experimentally verify an analytical model of simultaneous single-qubit gate error caused by microwave crosstalk that depends on a given pulse shape. By employing a model-based optimization strategy of qubit frequencies, we minimize the crosstalk-induced error across the processor and achieve a mean simultaneous single-qubit gate fidelity of 99.96% for a 16-ns gate duration, approaching the mean individual gate fidelity. To further reduce the simultaneous error and required qubit frequency bandwidth on high-crosstalk qubit pairs, we introduce a crosstalk transition suppression (CTS) pulse shaping technique that minimizes the spectral energy around transitions inducing leakage and crosstalk errors. Finally, we combine CTS with model-based frequency optimization across the device and experimentally show a systematic reduction in the required qubit frequency bandwidth for high-fidelity simultaneous gates, supported by simulations of systems with up to 1000 qubits. By alleviating constraints on qubit frequency bandwidth for parallel single-qubit operations, this work represents an important step for scaling towards larger quantum processors.

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arXiv2025

Above 99.9% Fidelity Single-Qubit Gates, Two-Qubit Gates, and Readout in a Single Superconducting Quantum Device

Achieving high-fidelity single-qubit gates, two-qubit gates, and qubit readout is critical for building scalable, error-corrected quantum computers. However, device parameters that enhance one operation often degrade the others, making simultaneous optimization challenging. Here, we demonstrate that careful tuning of qubit-coupler coupling strengths in a superconducting circuit with two transmon qubits coupled via a tunable coupler enables high-fidelity single- and two-qubit gates, without compromising readout performance. As a result, we achieve a 40h-averaged CZ gate fidelity of 99.93%, simultaneous single-qubit gate fidelities of 99.98%, and readout fidelities over 99.94% in a single device. These results are enabled by optimized coupling parameters, an efficient CZ gate calibration experiment based on our new Phased-Averaged Leakage Error Amplification (PALEA) protocol, and a readout configuration compatible with high coherence qubits. Our results demonstrate a viable path toward scaling up superconducting quantum processors while maintaining consistently high fidelities across all core operations.

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arXiv2024

Technology and Performance Benchmarks of IQM's 20-Qubit Quantum Computer

Quantum computing has tremendous potential to overcome some of the fundamental limitations present in classical information processing. Yet, today's technological limitations in the quality and scaling prevent exploiting its full potential. Quantum computing based on superconducting quantum processing units (QPUs) is among the most promising approaches towards practical quantum advantage. In this article the basic technological approach of IQM Quantum Computers is described covering both the QPU and the rest of the full-stack quantum computer. In particular, the focus is on a 20-qubit quantum computer featuring the Garnet QPU and its architecture, which we will scale up to 150 qubits. We also present QPU and system-level benchmarks, including a median 2-qubit gate fidelity of 99.5% and genuinely entangling all 20 qubits in a Greenberger-Horne-Zeilinger (GHZ) state.

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arXiv2024

Reducing leakage of single-qubit gates for superconducting quantum processors using analytical control pulse envelopes

Improving the speed and fidelity of quantum logic gates is essential to reach quantum advantage with future quantum computers. However, fast logic gates lead to increased leakage errors in superconducting quantum processors based on qubits with low anharmonicity, such as transmons. To reduce leakage errors, we propose and experimentally demonstrate two new analytical methods, Fourier ansatz spectrum tuning derivative removal by adiabatic gate (FAST DRAG) and higher-derivative (HD) DRAG, both of which enable shaping single-qubit control pulses in the frequency domain to achieve stronger suppression of leakage transitions compared to previously demonstrated pulse shapes. Using the new methods to suppress the $ef$-transition of a transmon qubit with an anharmonicity of -212 MHz, we implement $R_X(\pi/2)$-gates achieving a leakage error below $3.0 \times 10^{-5}$ down to a gate duration of 6.25 ns without the need for iterative closed-loop optimization. The obtained leakage error represents a 20-fold reduction in leakage compared to a conventional Cosine DRAG pulse. Employing the FAST DRAG method, we further achieve an error per gate of $(1.56 \pm 0.07)\times 10^{-4}$ at a 7.9-ns gate duration, outperforming conventional pulse shapes both in terms of error and gate speed. Furthermore, we study error-amplifying measurements for the characterization of temporal microwave control pulse distortions, and demonstrate that non-Markovian coherent errors caused by such distortions may be a significant source of error for sub-10-ns single-qubit gates unless corrected using predistortion.

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