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Soumen Pradhan

Publications and source records attributed to Soumen Pradhan.

6 recordsLinked to original sources

Beyond Impedance Additivity: A Systematic Nonlinear Perspective on Memristor Associations

We investigate the validity of the superposition principle and impedance additivity in AC circuits containing a memristive device connected in series with a resistor, capacitor, or inductor. While the series association of impedances is a cornerstone of linear circuit theory, its applicability to memory-bearing nonlinear systems remains largely unexplored. Using a state-dependent memristive model, we numerically analyze the stationary current response under sinusoidal excitation and characterize the resulting harmonic spectra, Bode diagrams, and Nyquist plots. To assess whether the fundamental response can still be interpreted through an equivalent-circuit framework, we introduce the concept of an apparent memristor, whose effective parameters are extracted directly from the composite impedance. We show that, although the fundamental harmonic can be accurately reproduced by an apparent equivalent circuit over selected parameter ranges, the effective parameters differ substantially from those of the isolated memristor, revealing a renormalization induced by the coupling to the passive element. More importantly, we identify parameter regimes in which the apparent-circuit description breaks down altogether, particularly for capacitor and inductor-coupled systems, demonstrating that the composite impedance cannot generally be expressed as the sum of independent impedances. These results establish boundaries for the use of equivalent-circuit models in memory-enabled electronic systems and provide practical guidelines for the interpretation of impedance spectroscopy in nonlinear devices exhibiting memory.

cond-mat.mtrl-sci

Phase-Topology Classification of Memristor Hysteresis Loops via Self-Crossings

Memristive devices have revolutionized non-volatile memory and neuromorphic computing, yet the geometry of their hysteresis loops -- in particular, the occurrence and robustness of multiple self-crossings -- remains poorly understood. Here we introduce a topological and algebraic framework that treats the number of transverse self-intersections of a memristor hysteresis loop as a robust integer-valued invariant. Drawing on differential topology, singularity theory, and cusp catastrophe, we employ discriminants and resultants to stratify the six-dimensional parameter space. This approach partitions the parameter space into structurally stable regions separated by explicitly computable catastrophe surfaces. We demonstrate that the crossing number remains strictly invariant under continuous deformations and changes only at self-tangencies or cusp singularities, thereby providing a complete classification of all multi-lobed hysteresis behaviors. These insights bridge device physics with modern singularity theory and suggest a clear roadmap for exploiting higher-order memory effects in next-generation electronics and brain-inspired hardware.

cond-mat.other

Gate-controlled analog memcapacitance in LaAlO3/SrTiO3 interface-based devices

Current memcapacitor implementations typically demand complex fabrication processes or depend on organic materials exhibiting poor environmental stability and reproducibility. Here, we demonstrate memcapacitor structures utilizing a quasi 2-dimensional electron gas, formed at the crystalline LaAlO3/SrTiO3 heterointerface, as electrodes and SiO2/SrTiO3 as dielectric layer. The observed memcapacitance originates from the charge localization in a lateral floating gate, while an applied gate voltage enables reversible tuning of the device capacitance. Furthermore, preprogrammed or erased gate biases enable controllable shifts of the capacitance hysteresis window toward positive or negative bias, leading to an enlarged capacitance gap at zero bias. A memcapacitor model developed for this system reproduces the main features of the experimental capacitance hysteresis, capturing the effects of charge fluctuations and dielectric frequency modulation within the oxide layer. The demonstrated low-voltage operation and gate tunability of oxide interface-based memcapacitors highlight their potential for power-efficient, capacitor-based neuromorphic and synaptic electronic architectures.

physics.app-ph

2D Canonical Approach for Beating the Boltzmann Tyranny Using Memory

The 60 mV$/$decade subthreshold limit at room temperature, coined as the Boltzmann tyranny, remains a fundamental obstacle to the continued down-scaling of conventional transistors. While several strategies have sought to overcome this constraint through non-thermal carrier injection, most rely on ferroelectric-based or otherwise material-specific mechanisms that require complex fabrication and stability control. Here, we develop a universal theoretical framework showing that intrinsic memory effects in nanometric field-effect transistors can naturally bypass this limit. Within the Landauer-B\"uttiker quantum transport formalism, we incorporate charge-trapping mechanisms that dynamically renormalize the conduction band edge. The resulting analytical expression for the subthreshold swing explicitly links memory dynamics to gate efficiency, revealing that a reduced carrier generation rate or enhanced trapping activity leads to sub-thermal switching, thus breaking the Boltzmann barrier. The model captures key experimental features and provides clear, generalizable design principles, establishing memory-assisted transistors as a robust pathway toward ultra-low-power and multifunctional electronic architectures.

physics.app-ph

Oxide Interface-Based Polymorphic Electronic Devices for Neuromorphic Computing

Aside from recent advances in artificial intelligence (AI) models, specialized AI hardware is crucial to address large volumes of unstructured and dynamic data. Hardware-based AI, built on conventional complementary metal-oxidesemiconductor (CMOS)-technology, faces several critical challenges including scaling limitation of devices [1, 2], separation of computation and memory units [3] and most importantly, overall system energy efficiency [4]. While numerous materials with emergent functionalities have been proposed to overcome these limitations, scalability, reproducibility, and compatibility remain critical obstacles [5, 6]. Here, we demonstrate oxide-interface based polymorphic electronic devices with programmable transistor, memristor, and memcapacitor functionalities by manipulating the quasi-two-dimensional electron gas in LaAlO3/SrTiO3 heterostructures [7, 8] using lateral gates. A circuit utilizing two polymorphic functionalities of transistor and memcapacitor exhibits nonlinearity and short-term memory, enabling implementation in physical reservoir computing. An integrated circuit incorporating transistor and memristor functionalities is utilized for the transition from short- to long-term synaptic plasticity and for logic operations, along with in-situ logic output storage. The same circuit with advanced reconfigurable synaptic logic operations presents high-level multi-input decision-making tasks, such as patient-monitoring in healthcare applications. Our findings pave the way for oxide-based monolithic integrated circuits in a scalable, silicon compatible, energy efficient single platform, advancing both the polymorphic and neuromorphic computings.

cond-mat.dis-nn

Accuracy Bottlenecks in Impedance Spectroscopy due to Transient Effects

Impedance spectroscopy is vital for material characterization and assessing electrochemical device performance. It provides real-time analysis of dynamic processes such as electrode kinetics, electrons, holes or ion transport, and interfacial or defect driven phenomena. However, the technique is sensitive to experimental conditions, introducing potential variability in results. The intricate interplay of transient effects within the realm of spectral impedance analyses introduces a layer of complexity that may impede straightforward interpretations. This demands a nuanced approach for refining analytical methodologies and ensuring the fidelity of impedance characterization once the dynamic contributions of transient ingredients cannot be disentangled from the underlying steady-state characteristics. In our study, we experimentally identify that the transient effects in a memristor device are most pronounced near an optimal frequency related to intrinsic relaxation times, with these effects diminishing as the frequency varies beyond or below this range. While inherent systematic errors impose a practical limit (accuracy floor) on achievable measurement accuracy, this paper offers qualitative and quantitative insights into how specific procedures affect this limit and how to reduce it in orders of magnitude. Only by effectively addressing these errors we can push beyond this constraint.

cond-mat.mes-hall