arXiv subjects

Stephan Eidenbenz

Publications and source records attributed to Stephan Eidenbenz.

At least 73 records · Page 4Linked to original sources

arXiv2023

Numerical Evidence for Exponential Speed-up of QAOA over Unstructured Search for Approximate Constrained Optimization

Despite much recent work, the true promise and limitations of the Quantum Alternating Operator Ansatz (QAOA) are unclear. A critical question regarding QAOA is to what extent its performance scales with the input size of the problem instance, in particular the necessary growth in the number of QAOA rounds to reach a high approximation ratio. We present numerical evidence for an exponential speed-up of QAOA over Grover-style unstructured search in finding approximate solutions to constrained optimization problems. Our result provides a strong hint that QAOA is able to exploit the structure of an optimization problem and thus overcome the lower bound for unstructured search. To this end, we conduct a comprehensive numerical study on several Hamming-weight constrained optimization problems for which we include combinations of all standardly studied mixer and phase separator Hamiltonians (Ring mixer, Clique mixer, Objective Value phase separator) as well as quantum minimum-finding inspired Hamiltonians (Grover mixer, Threshold-based phase separator). We identify Clique-Objective-QAOA with an exponential speed-up over Grover-Threshold-QAOA and tie the latter's scaling to that of unstructured search, with all other QAOA combinations coming in at a distant third. Our result suggests that maximizing QAOA performance requires a judicious choice of mixer and phase separator, and should trigger further research into other QAOA variations.

quant-ph↗

arXiv2023

Quantum Annealing vs. QAOA: 127 Qubit Higher-Order Ising Problems on NISQ Computers

Quantum annealing (QA) and Quantum Alternating Operator Ansatz (QAOA) are both heuristic quantum algorithms intended for sampling optimal solutions of combinatorial optimization problems. In this article we implement a rigorous direct comparison between QA on D-Wave hardware and QAOA on IBMQ hardware. These two quantum algorithms are also compared against classical simulated annealing. The studied problems are instances of a class of Ising models, with variable assignments of $+1$ or $-1$, that contain cubic $ZZZ$ interactions (higher order terms) and match both the native connectivity of the Pegasus topology D-Wave chips and the heavy hexagonal lattice of the IBMQ chips. The novel QAOA implementation on the heavy hexagonal lattice has a CNOT depth of $6$ per round and allows for usage of an entire heavy hexagonal lattice. Experimentally, QAOA is executed on an ensemble of randomly generated Ising instances with a grid search over $1$ and $2$ round angles using all 127 programmable superconducting transmon qubits of ibm_washington. The error suppression technique digital dynamical decoupling is also tested on all QAOA circuits. QA is executed on the same Ising instances with the programmable superconducting flux qubit devices D-Wave Advantage_system4.1 and Advantage_system6.1 using modified annealing schedules with pauses. We find that QA outperforms QAOA on all problem instances. We also find that dynamical decoupling enables 2-round QAOA to marginally outperform 1-round QAOA, which is not the case without dynamical decoupling.

quant-ph↗

arXiv2023

The Quantum Alternating Operator Ansatz for Satisfiability Problems

We comparatively study, through large-scale numerical simulation, the performance across a large set of Quantum Alternating Operator Ansatz (QAOA) implementations for finding approximate and optimum solutions to unconstrained combinatorial optimization problems. Our survey includes over 100 different mixing unitaries, and we combine each mixer with both the standard phase separator unitary representing the objective function and a thresholded version. Our numerical tests for randomly chosen instances of the unconstrained optimization problems Max 2-SAT and Max 3-SAT reveal that the traditional transverse-field mixer with the standard phase separator performs best for problem sizes of 8 through 14 variables, while the recently introduced Grover mixer with thresholding wins at problems of size 6. This result (i) corrects earlier work suggesting that the Grover mixer is a superior mixer based only on results from problems of size 6, thus illustrating the need to push numerical simulation to larger problem sizes to more accurately predict performance; and (ii) it suggests that more complicated mixers and phase separators may not improve QAOA performance.

quant-ph↗

arXiv2022

Optimized Telecloning Circuits: Theory and Practice of Nine NISQ Clones

Although perfect copying of an unknown quantum state is not possible, approximate cloning is possible in quantum mechanics. Quantum telecloning is a variant of approximate quantum cloning which uses quantum teleportation to allow for the use of classical communication to create physically separate clones of a quantum state. We present results of a of $1 \rightarrow 9$ universal, symmetric, optimal quantum telecloning implementation on a cloud accessible quantum computer - the Quantinuum H1-1 device. The H1-1 device allows direct creation of the telecloning protocol due to real time classical if-statements that are conditional on the mid-circuit measurement outcome of a Bell measurement. In this implementation, we also provide an improvement over previous work for the circuit model description of quantum telecloning, which reduces the required gate depth and gate count for an all-to-all connectivity. The demonstration of creating $9$ approximate clones on a quantum processor is the largest number of clones that has been generated, telecloning or otherwise.

quant-ph↗

arXiv2022

Quantum Telecloning on NISQ Computers

Due to the no-cloning theorem, generating perfect quantum clones of an arbitrary unknown quantum state is not possible, however approximate quantum clones can be constructed. Quantum telecloning is a protocol that originates from a combination of quantum teleportation and quantum cloning. Here we present $1 \rightarrow 2$ and $1 \rightarrow 3$ quantum telecloning circuits, with and without ancilla, that are theoretically optimal (meaning the clones have the highest fidelity allowed by quantum mechanics), universal (meaning the clone fidelity is independent of the state being cloned), and symmetric (meaning the clones all have the same fidelity). We implement these circuits on gate model IBMQ and Quantinuum NISQ hardware and quantify the clone fidelities using parallel single qubit state tomography. Quantum telecloning using mid-circuit measurement with classical feed-forward control (i.e. real time if statements) is demonstrated on the Quantinuum H1-2 device. Two alternative implementations of quantum telecloning, deferred measurement and post selection, are demonstrated on ibmq\_montreal, where mid-circuit measurements with real time if statements are not available. Our results show that NISQ devices can achieve near-optimal quantum telecloning fidelity; for example the Quantinuum H1-2 device running the telecloning circuits without ancilla achieved a mean clone fidelity of $0.824$ with standard deviation of $0.024$ for two clone circuits and $0.765$ with standard deviation of $0.022$ for three clone circuits. The theoretical fidelity limits are $0.8\overline{3}$ for two clones and $0.\overline{7}$ for three clones. This demonstrates the viability of performing experimental analysis of quantum information networks and quantum cryptography protocols on NISQ computers.

quant-ph↗

arXiv2022

Short-Depth Circuits for Dicke State Preparation

We present short-depth circuits to deterministically prepare any Dicke state |Dn,k>, which is the equal-amplitude superposition of all n-qubit computational basis states with Hamming Weight k. Dicke states are an important class of entangled quantum states with a large variety of applications, and a long history of experimental creation in physical systems. On the other hand, not much is known regarding efficient scalable quantum circuits for Dicke state preparation on realistic quantum computing hardware connectivities. Here we present preparation circuits for Dicke states |Dn,k> with (i) a depth of O(k log(n/k)) for All-to-All connectivity (such as on current ion trap devices); (ii) a depth of O(k sqrt(n/k)) = O(sqrt(nk) for Grid connectivity on grids of size Omega(sqrt(n/s)) x O(sqrt(ns)) with s<=k (such as on current superconducting qubit devices). Both approaches have a total gate count of O(kn), need no ancilla qubits, and generalize to both the preparation and compression of symmetric pure states in which all non-zero amplitudes correspond to states with Hamming weight at most k. Thus our work significantly improves and expands previous state-of-the art circuits which had depth O(n) on a Linear Nearest Neighbor connectivity for arbitrary k (Fundamentals of Computation Theory 2019) and depth O(log n) on All-to-All connectivity for k=1 (Advanced Quantum Technologies 2019).

quant-ph↗

arXiv2022

Quantum Algorithm Implementations for Beginners

As quantum computers become available to the general public, the need has arisen to train a cohort of quantum programmers, many of whom have been developing classical computer programs for most of their careers. While currently available quantum computers have less than 100 qubits, quantum computing hardware is widely expected to grow in terms of qubit count, quality, and connectivity. This review aims to explain the principles of quantum programming, which are quite different from classical programming, with straightforward algebra that makes understanding of the underlying fascinating quantum mechanical principles optional. We give an introduction to quantum computing algorithms and their implementation on real quantum hardware. We survey 20 different quantum algorithms, attempting to describe each in a succinct and self-contained fashion. We show how these algorithms can be implemented on IBM's quantum computer, and in each case, we discuss the results of the implementation with respect to differences between the simulator and the actual hardware runs. This article introduces computer scientists, physicists, and engineers to quantum algorithms and provides a blueprint for their implementations.

cs.ET↗

arXiv2022

Fair Sampling Error Analysis on NISQ Devices

We study the status of fair sampling on Noisy Intermediate Scale Quantum (NISQ) devices, in particular the IBM Q family of backends. Using the recently introduced Grover Mixer-QAOA algorithm for discrete optimization, we generate fair sampling circuits to solve six problems of varying difficulty, each with several optimal solutions, which we then run on twenty backends across the IBM Q system. For a given circuit evaluated on a specific set of qubits, we evaluate: how frequently the qubits return an optimal solution to the problem, the fairness with which the qubits sample from all optimal solutions, and the reported hardware error rate of the qubits. To quantify fairness, we define a novel metric based on Pearson's $χ^2$ test. We find that fairness is relatively high for circuits with small and large error rates, but drops for circuits with medium error rates. This indicates that structured errors dominate in this regime, while unstructured errors, which are random and thus inherently fair, dominate in noisier qubits and longer circuits. Our results show that fairness can be a powerful tool for understanding the intricate web of errors affecting current NISQ hardware.

quant-ph↗

arXiv2022

A Divide-and-Conquer Approach to Dicke State Preparation

We present a divide-and-conquer approach to deterministically prepare Dicke states $\lvert D_k^n\rangle$ (i.e., equal-weight superpositions of all $n$-qubit states with Hamming Weight $k$) on quantum computers. In an experimental evaluation for up to $n=6$ qubits on IBM Quantum Sydney and Montreal devices, we achieve significantly higher state fidelity compared to previous results [Mukherjee and others, TQE'2020], [Cruz and others, QuTe'2019]. The fidelity gains are achieved through several techniques: Our circuits first "divide" the Hamming weight between blocks of $n/2$ qubits, and then "conquer" those blocks with improved versions of Dicke state unitaries [Bärtschi and others, FCT'2019]. Due to the sparse connectivity on IBM's heavy-hex-architectures, these circuits are implemented for linear nearest neighbor topologies. Further gains in (estimating) the state fidelity are due to our use of measurement error mitigation and hardware progress.

quant-ph↗

arXiv2021

Threshold-Based Quantum Optimization

We propose and study Th-QAOA (pronounced Threshold QAOA), a variation of the Quantum Alternating Operator Ansatz (QAOA) that replaces the standard phase separator operator, which encodes the objective function, with a threshold function that returns a value $1$ for solutions with an objective value above the threshold and a $0$ otherwise. We vary the threshold value to arrive at a quantum optimization algorithm. We focus on a combination with the Grover Mixer operator; the resulting GM-Th-QAOA can be viewed as a generalization of Grover's quantum search algorithm and its minimum/maximum finding cousin to approximate optimization. Our main findings include: (i) we provide intuitive arguments and show empirically that the optimum parameter values of GM-Th-QAOA (angles and threshold value) can be found with $O(\log(p) \times \log M)$ iterations of the classical outer loop, where $p$ is the number of QAOA rounds and $M$ is an upper bound on the solution value (often the number of vertices or edges in an input graph), thus eliminating the notorious outer-loop parameter finding issue of other QAOA algorithms; (ii) GM-Th-QAOA can be simulated classically with little effort up to 100 qubits through a set of tricks that cut down memory requirements; (iii) somewhat surprisingly, GM-Th-QAOA outperforms non-thresholded GM-QAOA in terms of approximation ratios achieved. This third result holds across a range of optimization problems (MaxCut, Max k-VertexCover, Max k-DensestSubgraph, MaxBisection) and various experimental design parameters, such as different input edge densities and constraint sizes.

quant-ph↗

arXiv2021

Sampling on NISQ Devices: "Who's the Fairest One of All?"

Modern NISQ devices are subject to a variety of biases and sources of noise that degrade the solution quality of computations carried out on these devices. A natural question that arises in the NISQ era, is how fairly do these devices sample ground state solutions. To this end, we run five fair sampling problems (each with at least three ground state solutions) that are based both on quantum annealing and on the Grover Mixer-QAOA algorithm for gate-based NISQ hardware. In particular, we use seven IBM~Q devices, the Aspen-9 Rigetti device, the IonQ device, and three D-Wave quantum annealers. For each of the fair sampling problems, we measure the ground state probability, the relative fairness of the frequency of each ground state solution with respect to the other ground state solutions, and the aggregate error as given by each hardware provider. Overall, our results show that NISQ devices do not achieve fair sampling yet. We also observe differences in the software stack with a particular focus on compilation techniques that illustrate what work will still need to be done to achieve a seamless integration of frontend (i.e. quantum circuit description) and backend compilation.

quant-ph↗

arXiv2021

PPT-Multicore: Performance Prediction of OpenMP applications using Reuse Profiles and Analytical Modeling

We present PPT-Multicore, an analytical model embedded in the Performance Prediction Toolkit (PPT) to predict parallel application performance running on a multicore processor. PPT-Multicore builds upon our previous work towards a multicore cache model. We extract LLVM basic block labeled memory trace using an architecture-independent LLVM-based instrumentation tool only once in an application's lifetime. The model uses the memory trace and other parameters from an instrumented sequentially executed binary. We use a probabilistic and computationally efficient reuse profile to predict the cache hit rates and runtimes of OpenMP programs' parallel sections. We model Intel's Broadwell, Haswell, and AMD's Zen2 architectures and validate our framework using different applications from PolyBench and PARSEC benchmark suites. The results show that PPT-Multicore can predict cache hit rates with an overall average error rate of 1.23% while predicting the runtime with an error rate of 9.08%.

cs.PF↗

arXiv2021

PPT-SASMM: Scalable Analytical Shared Memory Model: Predicting the Performance of Multicore Caches from a Single-Threaded Execution Trace

Performance modeling of parallel applications on multicore processors remains a challenge in computational co-design due to multicore processors' complex design. Multicores include complex private and shared memory hierarchies. We present a Scalable Analytical Shared Memory Model (SASMM). SASMM can predict the performance of parallel applications running on a multicore. SASMM uses a probabilistic and computationally-efficient method to predict the reuse distance profiles of caches in multicores. SASMM relies on a stochastic, static basic block-level analysis of reuse profiles. The profiles are calculated from the memory traces of applications that run sequentially rather than using multi-threaded traces. The experiments show that our model can predict private L1 cache hit rates with 2.12% and shared L2 cache hit rates with about 1.50% error rate.

cs.DC↗

arXiv2020

Machine Learning Enabled Scalable Performance Prediction of Scientific Codes

We present the Analytical Memory Model with Pipelines (AMMP) of the Performance Prediction Toolkit (PPT). PPT-AMMP takes high-level source code and hardware architecture parameters as input, predicts runtime of that code on the target hardware platform, which is defined in the input parameters. PPT-AMMP transforms the code to an (architecture-independent) intermediate representation, then (i) analyzes the basic block structure of the code, (ii) processes architecture-independent virtual memory access patterns that it uses to build memory reuse distance distribution models for each basic block, (iii) runs detailed basic-block level simulations to determine hardware pipeline usage. PPT-AMMP uses machine learning and regression techniques to build the prediction models based on small instances of the input code, then integrates into a higher-order discrete-event simulation model of PPT running on Simian PDES engine. We validate PPT-AMMP on four standard computational physics benchmarks, finally present a use case of hardware parameter sensitivity analysis to identify bottleneck hardware resources on different code inputs. We further extend PPT-AMMP to predict the performance of scientific application (radiation transport), SNAP. We analyze the application of multi-variate regression models that accurately predict the reuse profiles and the basic block counts. The predicted runtimes of SNAP when compared to that of actual times are accurate.

cs.PF↗

arXiv2020

Grover Mixers for QAOA: Shifting Complexity from Mixer Design to State Preparation

We propose GM-QAOA, a variation of the Quantum Alternating Operator Ansatz (QAOA) that uses Grover-like selective phase shift mixing operators. GM-QAOA works on any NP optimization problem for which it is possible to efficiently prepare an equal superposition of all feasible solutions; it is designed to perform particularly well for constraint optimization problems, where not all possible variable assignments are feasible solutions. GM-QAOA has the following features: (i) It is not susceptible to Hamiltonian Simulation error (such as Trotterization errors) as its operators can be implemented exactly using standard gate sets and (ii) Solutions with the same objective value are always sampled with the same amplitude. We illustrate the potential of GM-QAOA on several optimization problem classes: for permutation-based optimization problems such as the Traveling Salesperson Problem, we present an efficient algorithm to prepare a superposition of all possible permutations of $n$ numbers, defined on $O(n^2)$ qubits; for the hard constraint $k$-Vertex-Cover problem, and for an application to Discrete Portfolio Rebalancing, we show that GM-QAOA outperforms existing QAOA approaches.

quant-ph↗

arXiv2020

The Quantum Alternating Operator Ansatz on Maximum k-Vertex Cover

The Quantum Alternating Operator Ansatz is a generalization of the Quantum Approximate Optimization Algorithm (QAOA) designed for finding approximate solutions to combinatorial optimization problems with hard constraints. In this paper, we study Maximum $k$-Vertex Cover under this ansatz due to its modest complexity, while still being more complex than the well studied problems of Max-Cut and Max E3-LIN2. Our approach includes (i) a performance comparison between easy-to-prepare classical states and Dicke states as starting states, (ii) a performance comparison between two $XY$-Hamiltonian mixing operators: the ring mixer and the complete graph mixer, (iii) an analysis of the distribution of solutions via Monte Carlo sampling, and (iv) the exploration of efficient angle selection strategies. Our results are: (i) Dicke states improve performance compared to easy-to-prepare classical states, (ii) an upper bound on the simulation of the complete graph mixer, (iii) the complete graph mixer improves performance relative to the ring mixer, (iv) numerical results indicating the standard deviation of the distribution of solutions decreases exponentially in $p$ (the number of rounds in the algorithm), requiring an exponential number of random samples to find a better solution in the next round, and (v) a correlation of angle parameters which exhibit high quality solutions that behave similarly to a discretized version of the Quantum Adiabatic Algorithm.

quant-ph↗

arXiv2020

Verified Instruction-Level Energy Consumption Measurement for NVIDIA GPUs

GPUs are prevalent in modern computing systems at all scales. They consume a significant fraction of the energy in these systems. However, vendors do not publish the actual cost of the power/energy overhead of their internal microarchitecture. In this paper, we accurately measure the energy consumption of various PTX instructions found in modern NVIDIA GPUs. We provide an exhaustive comparison of more than 40 instructions for four high-end NVIDIA GPUs from four different generations (Maxwell, Pascal, Volta, and Turing). Furthermore, we show the effect of the CUDA compiler optimizations on the energy consumption of each instruction. We use three different software techniques to read the GPU on-chip power sensors, which use NVIDIA's NVML API and provide an in-depth comparison between these techniques. Additionally, we verified the software measurement techniques against a custom-designed hardware power measurement. The results show that Volta GPUs have the best energy efficiency of all the other generations for the different categories of the instructions. This work should aid in understanding NVIDIA GPUs' microarchitecture. It should also make energy measurements of any GPU kernel both efficient and accurate.

cs.DC↗

arXiv2019

Low Overhead Instruction Latency Characterization for NVIDIA GPGPUs

The last decade has seen a shift in the computer systems industry where heterogeneous computing has become prevalent. Graphics Processing Units (GPUs) are now present in supercomputers to mobile phones and tablets. GPUs are used for graphics operations as well as general-purpose computing (GPGPUs) to boost the performance of compute-intensive applications. However, the percentage of undisclosed characteristics beyond what vendors provide is not small. In this paper, we introduce a very low overhead and portable analysis for exposing the latency of each instruction executing in the GPU pipeline(s) and the access overhead of the various memory hierarchies found in GPUs at the micro-architecture level. Furthermore, we show the impact of the various optimizations the CUDA compiler can perform over the various latencies. We perform our evaluation on seven different high-end NVIDIA GPUs from five different generations/architectures: Kepler, Maxwell, Pascal, Volta, and Turing. The results in this paper can help architects to have an accurate characterization of the latencies of these GPUs, which will help in modeling the hardware accurately. Also, software developers can perform informed optimizations to their applications.

cs.DC↗