arXiv subjects

Stephan Menzel

Publications and source records attributed to Stephan Menzel.

At least 19 recordsLinked to original sources

arXiv2026

OTTER - Two Transistor - One RRAM Architecture for Reliable In-Memory-Computing in 28 nm CMOS Technology

This work presents OTTER, a 28 nm CMOS platform co-integrated with TaOx-based valence-change mechanism (VCM) RRAM, demonstrating a two-transistor-one-memristive-device (2T1R) architecture for reliable in-memory computing. The 2T1R cell combines a low-drive-current (LD) transistor and a high-drive-current (HD) transistor in parallel, providing dedicated bias paths for SET programming and RESET operation, respectively. Through systematic experimental and simulated comparison of various transistor-pairing configurations using the physical compact model JART VCM Rth, design guidelines for transistor sizing are derived, establishing the minimum RESET transistor W/L required for complete RESET as a function of the SET current compliance. The 2T1R cell is further characterized under pulse-based programming, demonstrating multilevel analog conductance tuning with narrow, well separated conductance states across six programmable levels. An analog content-addressable memory (aCAM) design based on the same 2T1R cell is additionally analyzed at the circuit level, evaluating trade-offs between top- and bottom-connected RRAM comparator configurations. A hardware implementation of compute-in-memory (CIM) multiply-and-accumulate (MAC) operations is further demonstrated on a 15 x 15 2T1R crossbar array.

cs.ET↗

arXiv2026

Study of Resistive Switching Dynamics and Memory States Equilibria in Analog Filamentary Conductive-Metal-Oxide/HfOx ReRAM via Compact Modeling

Resistive Random Access Memory (ReRAM) devices offer a promising solution for next-generation non-volatile memory and neuromorphic computing systems. Yet, existing compact models fail to capture analog resistive switching behavior of ReRAM devices. This work presents an advanced physics-based compact model for analog filamentary Conductive-Metal-Oxide (CMO)/HfOx ReRAM, capable of reproducing switching characteristics over a broad range of operating conditions. Compared to the state-of-the-art, the model extends the dynamic interplay between ion migration and electron hopping, while also accounting for parasitic resistive elements. Simulations of various voltage inputs are tested to reproduce quasi-static I-V curves, SET switching kinetics under single-pulse programming conditions, and analog accumulative conductance modulation upon bipolar identical pulse streams. Additional simulations reveal the physical criterion underlying the stabilization of the CMO/HfOx-based ReRAM memory state around the equilibrium point, namely symmetry point, under pulsing conditions when a fading memory mechanism emerges. Building upon the evidence of such equilibrium stabilization under pulsing and quasi-static conditions, a procedure is established to visualize and map equilibrium memory states across different input domains. The physical model supports design optimization of switching behavior for analog neuromorphic systems and non-volatile memory architectures. It also enables accurate integrated circuit simulations with CMO/HfOx-based ReRAM technology.

cs.ET↗

arXiv2026

Learning Nonlinear Heterogeneity in Physical Kolmogorov-Arnold Networks

Physical neural networks typically train linear synaptic weights while treating device nonlinearities as fixed. We show the opposite - by training the synaptic nonlinearity itself, as in Kolmogorov-Arnold Network (KAN) architectures, we yield markedly higher task performance per physical resource and improved performance-parameter scaling than conventional linear weight-based networks, demonstrating ability of KAN topologies to exploit reconfigurable nonlinear physical dynamics. We experimentally realise physical KANs in silicon-on-insulator devices we term 'Synaptic Nonlinear Elements' (SYNEs), operating at room temperature, microampere currents, 2 MHz speeds and ~750 fJ per nonlinear operation, with no observed degradation over 10^13 measurements and months-long timescales. We demonstrate nonlinear function regression, classification, and prediction of Li-Ion battery dynamics from noisy real-world multi-sensor data. Physical KANs outperform equivalently-parameterised software multilayer perceptron networks across all tasks, with up to two orders of magnitude fewer parameters, and two orders of magnitude fewer devices than linear weight based physical networks. These results establish learned physical nonlinearity as a hardware-native computational primitive for compact and efficient learning systems, and SYNE devices as effective substrates for heterogenous nonlinear computing.

cond-mat.dis-nn↗

arXiv2025

Reduced Variability in Threshold Switches Using Heterostructures of SiO${_x}$ and Vertically Aligned MoS${_2}$

Layered two-dimensional (2D) materials provide unique structural features, such as physical gaps between their layers that are only connected through van der Waals (vdW) forces. These vdW gaps can guide the migration of intercalated ions and thus regulate filament growth in resistive switching (RS) devices. Vertically aligned 2D materials and their heterostructures provide vdW gap-mediated ion transport in memristor crossbars, providing great potential for high-density integration and reliable RS performance. Nevertheless, the fundamental switching mechanisms and their contributions to the RS remain inadequately understood. In this work, we investigate silver (Ag) filament-based threshold switching (TS) in heterostructures comprising vertically aligned 2D molybdenum disulfide (VAMoS${_2}$) grown via sulfurization and silicon oxide (SiO${_x}$). Compared to SiO${_x}$-only devices, the SiO${_x}$/VAMoS${_2}$ devices exhibit TS with higher on-threshold and hold voltages, each approximately 0.4 V, faster switching times down to 356 ns under a 4 V pulse, and a lower cycle-to-cycle on-current variability of 3.0%. A physics-based, variability-aware model reveals that confined Ag ion migration within the vdW gaps in VAMoS${_2}$ forms ultrathin seed filaments, which guide filament growth in the SiO${_x}$ layer. These findings establish SiO${_x}$/VAMoS${_2}$ heterostructures as a promising concept for reliable TS in vertical device architectures for emerging memories and neuromorphic computing.

physics.app-ph↗

arXiv2025

Intermediate Resistive State in Wafer-Scale MoS${_2}$ Memristors through Lateral Silver Filament Growth for Artificial Synapse Applications

Memristors based on two-dimensional materials (2DMs) have garnered significant attention due to their fast resistive switching (RS) behavior and atomic-level thickness, which enables low power consumption, making them promising candidates for neuromorphic computing. Among these, memristors based on molybdenum disulfide (MoS${_2}$) have been extensively studied. Their RS has been attributed to the formation and rupture of conductive filaments (CFs). However, the underlying mechanism of filament formation remains underexplored, and the inherently stochastic nature of RS leads to high variability and limited reproducibility. Additionally, the lack of scalable fabrication techniques for 2DM-based memristors restricts their integration into standard semiconductor technology. Here, we demonstrate memristors based on metal-organic chemical vapor-deposited MoS${_2}$ on the wafer-scale. Our devices exhibit volatile and nonvolatile RS behavior, tunable by modulating the current compliance. Notably, we observe stable RS characteristics in an intermediate resistive state (IRS), featuring set and reset voltages within $\pm$1 V, an endurance exceeding 2500 cycles in direct current mode, and a state retention over 10${^6}$ s. The experimental data, complemented with simulations, suggest that the IRS originates from the lateral growth of the CF within the MoS${_2}$ layer. Furthermore, the devices successfully emulate synaptic plasticity with current responses on the microsecond timescale, highlighting their potential for large-scale integration in neuromorphic computing architectures.

physics.app-ph↗

arXiv2025

Analytical Modelling of the Transport in Analog Filamentary Conductive-Metal-Oxide/HfOx ReRAM Devices

The recent co-optimization of memristive technologies and programming algorithms enabled neural networks training with in-memory computing systems. In this context, novel analog filamentary conductive-metal-oxide (CMO)/HfOx redox-based resistive switching memory (ReRAM) represents a key technology. Despite device performance enhancements reported in literature, the underlying mechanism behind resistive switching is not fully understood. This work presents the first physics-based analytical model of the current transport and of the resistive switching in these devices. As a case study, analog TaOx/HfOx ReRAM devices are considered. The current transport is explained by a trap-to-trap tunneling process, and the resistive switching by a modulation of the defect density within the sub-band of the TaOx that behaves as electric field and temperature confinement layer. The local temperature and electric field distributions are derived from the solution of the electric and heat transport equations in a 3D finite element ReRAM model. The intermediate resistive states are described as a gradual modulation of the TaOx defect density, which results in a variation of its electrical conductivity. The drift-dynamics of ions during the resistive switching is analytically described, allowing the estimation of defect migration energies in the TaOx layer. Moreover, the role of the electro-thermal properties of the CMO layer is unveiled. The proposed analytical model accurately describes the experimental switching characteristic of analog TaOx/HfOx ReRAM devices, increasing the physical understanding and providing the equations necessary for circuit simulations incorporating this technology.

cs.ET↗

arXiv2025

A device-level compact model for mushroom-type phase change memory

In this work we introduce a compact model for mushroom-type phase-change memory devices that incorporates the shape and size of the amorphous mark under different programming conditions, and is applicable to both projecting and non-projecting devices. The model includes analytical equations for the amorphous and crystalline regions and uniquely features a current leakage path that injects current at the outer edge of the electrodes. The results demonstrate that accurately modeling the size and shape of the phase configurations is crucial for predicting the full-span of the RESET and SET programming, including the characteristics of threshold switching. Additionally, the model effectively captures read-out behaviors, including the dependence of resistance drift and bipolar current asymmetry behaviours on the phase configurations. The compact model is also provided in Verilog-A format, so it can be easily used in standard circuit-level simulation tools.

physics.app-ph↗

arXiv2025

Mixed-Mode In-Memory Computing: Towards High-Performance Logic Processing In A Memristive Crossbar Array

In-memory computing is a promising alternative to traditional computer designs, as it helps overcome performance limits caused by the separation of memory and processing units. However, many current approaches struggle with unreliable device behavior, which affects data accuracy and efficiency. In this work, the authors present a new computing method that combines two types of operations,those based on electrical resistance and those based on voltage, within each memory cell. This design improves reliability and avoids the need for expensive current measurements. A new software tool also helps automate the design process, supporting highly parallel operations in dense two-dimensional memory arrays. The approach balances speed and space, making it practical for advanced computing tasks. Demonstrations include a digital adder and a key part of the encryption module, showing both strong performance and accuracy. This work offers a new direction for reliable and efficient in-memory computing systems with real-world applications.

physics.app-ph↗

arXiv2025

Threshold Switching in Vertically Aligned MoS${_2}$/SiO${_x}$ Heterostructures based on Silver Ion Migration

Threshold switching (TS) is a phenomenon where non-permanent changes in electrical resistance of a two-terminal device can be controlled by modulating the voltage bias. TS based on silver (Ag) conductive filaments has been observed in many materials, including layered two-dimensional (2D) transition metal dichalcogenides (TMDs). 2D TMDs are particularly promising for metal ion movement due to their van der Waals (vdW) gaps between their sheets, facilitating ion migration and filament formation without disturbing covalent chemical bonds. In this work, we demonstrate the heterostructure growth of vertically aligned molybdenum disulfide (VAMoS${_2}$) with an amorphous silicon oxide (SiO${_x}$) layer on top after sulfurization. We show that Ag ions migrate through this material stack, enabling TS. Our Ag/SiO${_x}$/VAMoS${_2}$/gold (Au) devices exhibit TS at low voltages of ~0.63 V, with high on-state currents over 200 ${\mu}$A and stable switching exceeding 10${^4}$ cycles. Moreover, we identify two rate-limiting steps for filament formation through a physics-based dynamical model and simulate the switching kinetics. Our devices show a fast on-switching time of 311 ns and spontaneous relaxation in 233 ns. These findings deepen the understanding of SiOx/MoS${_2}$-based RS devices and demonstrate the promise for applications in emerging memories and neuromorphic computing systems.

cond-mat.mtrl-sci↗

arXiv2025

Influence of Humidity on the Resistive Switching of Hexagonal Boron Nitride-Based Memristors

Two-dimensional material-based memristors have recently gained attention as components of future neuromorphic computing concepts. However, their surrounding atmosphere can influence their behavior. In this work, we investigate the resistive switching behavior of hexagonal boron nitride-based memristors with active nickel electrodes under vacuum conditions. Our cells exhibit repeatable, bipolar, nonvolatile switching under voltage stress after initial forming, with a switching window > 10${^3}$ under ambient conditions. However, in a vacuum, the forming is suppressed, and hence, no switching is observed. Compact model simulations can reproduce the set kinetics of our cells under ambient conditions and predict highly suppressed resistive switching in a water-deficient environment, supporting the experimental results. Our findings have important implications for the application of h-BN-based memristors with electrochemically active electrodes since semiconductor chips are typically processed under high vacuum conditions and encapsulated to protect them from atmospheric influences.

cond-mat.mtrl-sci↗

arXiv2024

Employing Vector Field Techniques on the Analysis of Memristor Cellular Nonlinear Networks Cell Dynamics

This paper introduces an innovative graphical analysis tool for investigating the dynamics of Memristor Cellular Nonlinear Networks (M-CNNs) featuring 2nd-order processing elements, known as M-CNN cells. In the era of specialized hardware catering to the demands of intelligent autonomous systems, the integration of memristors within Cellular Nonlinear Networks (CNNs) has emerged as a promising paradigm due to their exceptional characteristics. However, the standard Dynamic Route Map (DRM) analysis, applicable to 1st-order systems, fails to address the intricacies of 2nd-order M-CNN cell dynamics, as well the 2nd-order DRM (DRM2) exhibits limitations on the graphical illustration of local dynamical properties of the M-CNN cells, e.g. state derivative's magnitude. To address this limitation, we propose a novel integration of M-CNN cell vector field into the cell's phase portrait, enhancing the analysis efficacy and enabling efficient M-CNN cell design. A comprehensive exploration of M-CNN cell dynamics is presented, showcasing the utility of the proposed graphical tool for various scenarios, including bistable and monostable behavior, and demonstrating its superior ability to reveal subtle variations in cell behavior. Through this work, we offer a refined perspective on the analysis and design of M-CNNs, paving the way for advanced applications in edge computing and specialized hardware.

cs.ET↗

arXiv2024

Synaptogen: A cross-domain generative device model for large-scale neuromorphic circuit design

We present a fast generative modeling approach for resistive memories that reproduces the complex statistical properties of real-world devices. To enable efficient modeling of analog circuits, the model is implemented in Verilog-A. By training on extensive measurement data of integrated 1T1R arrays (6,000 cycles of 512 devices), an autoregressive stochastic process accurately accounts for the cross-correlations between the switching parameters, while non-linear transformations ensure agreement with both cycle-to-cycle (C2C) and device-to-device (D2D) variability. Benchmarks show that this statistically comprehensive model achieves read/write throughputs exceeding those of even highly simplified and deterministic compact models.

cs.NE↗

arXiv2024

Integration of Physics-Derived Memristor Models with Machine Learning Frameworks

Simulation frameworks such MemTorch, DNN+NeuroSim, and aihwkit are commonly used to facilitate the end-to-end co-design of memristive machine learning (ML) accelerators. These simulators can take device nonidealities into account and are integrated with modern ML frameworks. However, memristors in these simulators are modeled with either lookup tables or simple analytic models with basic nonlinearities. These simple models are unable to capture certain performance-critical aspects of device nonidealities. For example, they ignore the physical cause of switching, which induces errors in switching timings and thus incorrect estimations of conductance states. This work aims at bringing physical dynamics into consideration to model nonidealities while being compatible with GPU accelerators. We focus on Valence Change Memory (VCM) cells, where the switching nonlinearity and SET/RESET asymmetry relate tightly with the thermal resistance, ion mobility, Schottky barrier height, parasitic resistance, and other effects. The resulting dynamics require solving an ODE that captures changes in oxygen vacancies. We modified a physics-derived SPICE-level VCM model, integrated it with the aihwkit simulator and tested the performance with the MNIST dataset. Results show that noise that disrupts the SET/RESET matching affects network performance the most. This work serves as a tool for evaluating how physical dynamics in memristive devices affect neural network accuracy and can be used to guide the development of future integrated devices.

cs.ET↗

arXiv2024

Resistive switching acceleration induced by thermal confinement

Enhancing the switching speed of oxide-based memristive devices at a low voltage level is crucial for their use as non-volatile memory and their integration into emerging computing paradigms such as neuromorphic computing. Efforts to accelerate the switching speed often result in an energy tradeoff, leading to an increase of the minimum working voltage. In our study, we present an innovative solution: the introduction of a low thermal conductivity layer placed within the active electrode, which impedes the dissipation of heat generated during the switching process. The result is a notable acceleration in the switching speed of the memristive model system SrTiO$_{3}$ by a remarkable factor of 10$^{3}$, while preserving the integrity of the switching layer and the interfaces with the electrodes, rendering it adaptable to various filamentary memristive systems. The incorporation of HfO$_{2}$ or TaO$_{x}$ as heat-blocking layers not only streamlines the fabrication process, but also ensures compatibility with complementary metal-oxide-semiconductor technology.

physics.app-ph↗

arXiv2023

Resistive Switching and Current Conduction Mechanisms in Hexagonal Boron Nitride Threshold Memristors with Nickel Electrodes

The two-dimensional (2D) insulating material hexagonal boron nitride (h BN) has attracted much attention as the active medium in memristive devices due to its favorable physical properties, among others, a wide bandgap that enables a large switching window. Metal filament formation is frequently suggested for h-BN devices as the resistive switching (RS) mechanism, usually supported by highly specialized methods like conductive atomic force microscopy (C-AFM) or transmission electron microscopy (TEM). Here, we investigate the switching of multilayer hexagonal boron nitride (h-BN) threshold memristors with two nickel (Ni) electrodes through their current conduction mechanisms. Both the high and the low resistance states are analyzed through temperature-dependent current-voltage measurements. We propose the formation and retraction of nickel filaments along boron defects in the h-BN film as the resistive switching mechanism. We corroborate our electrical data with TEM analyses to establish temperature-dependent current-voltage measurements as a valuable tool for the analysis of resistive switching phenomena in memristors made of 2D materials. Our memristors exhibit a wide and tunable current operation range and low stand-by currents, in line with the state of the art in h-BN-based threshold switches, a low cycle-to-cycle variability of 5%, and a large On/Off ratio of 10${^7}$.

physics.app-ph↗

arXiv2021

NeuroHammer: Inducing Bit-Flips in Memristive Crossbar Memories

Emerging non-volatile memory (NVM) technologies offer unique advantages in energy efficiency, latency, and features such as computing-in-memory. Consequently, emerging NVM technologies are considered an ideal substrate for computation and storage in future-generation neuromorphic platforms. These technologies need to be evaluated for fundamental reliability and security issues. In this paper, we present \emph{NeuroHammer}, a security threat in ReRAM crossbars caused by thermal crosstalk between memory cells. We demonstrate that bit-flips can be deliberately induced in ReRAM devices in a crossbar by systematically writing adjacent memory cells. A simulation flow is developed to evaluate NeuroHammer and the impact of physical parameters on the effectiveness of the attack. Finally, we discuss the security implications in the context of possible attack scenarios.

cs.ET↗

arXiv2021

Intrinsic RESET speed limit of valence change memories

During the last decade, valence change memory (VCM) has been extensively studied due to its promising features, such as a high endurance and fast switching times. The information is stored in a high resistive state (logcial '0', HRS) and a low resistive state (logcial '1', LRS). It can also be operated in two different writing schemes, namely a unipolar switching mode (LRS and HRS are written at the same voltage polarity) and a bipolar switching mode (LRS and HRS are written at opposite voltage polarities). VCM, however, still suffers from a large variability during writing operations and also faults occur, which are not yet fully understood and, therefore, require a better understanding of the underlying fault mechanisms. In this study, a new intrinsic failure mechanism is identified, which prohibits RESET times (transition from LRS to HRS) faster than 400 ps and possibly also limits the endurance. We demonstrate this RESET speed limitation by measuring the RESET kinetics of two valence change memory devices (namely Pt/TaO$_\mathrm{x}$/Ta and Pt/ZrO$_\mathrm{x}$/Ta) in the time regime from 50 ns to 50 ps, corresponding to the fastest writing time reported for VCM. Faster RESET times were achieved by increasing the applied pulse voltage. Above a voltage threshold it was, however, no longer possible to reset both types of devices. Instead a unipolar SET (transition from HRS to LRS) event occurred, preventing faster RESET times. The occurrence of the unipolar SET is attributed to an oxygen exchange at the interface to the Pt~electrode, which can be suppressed by introducing an oxygen blocking layer at this interface, which also allowed for 50 ps fast RESET times.

physics.app-ph↗

arXiv2021

2022 Roadmap on Neuromorphic Computing and Engineering

Modern computation based on the von Neumann architecture is today a mature cutting-edge science. In the Von Neumann architecture, processing and memory units are implemented as separate blocks interchanging data intensively and continuously. This data transfer is responsible for a large part of the power consumption. The next generation computer technology is expected to solve problems at the exascale with 1018 calculations each second. Even though these future computers will be incredibly powerful, if they are based on von Neumann type architectures, they will consume between 20 and 30 megawatts of power and will not have intrinsic physically built-in capabilities to learn or deal with complex data as our brain does. These needs can be addressed by neuromorphic computing systems which are inspired by the biological concepts of the human brain. This new generation of computers has the potential to be used for the storage and processing of large amounts of digital information with much lower power consumption than conventional processors. Among their potential future applications, an important niche is moving the control from data centers to edge devices. The aim of this Roadmap is to present a snapshot of the present state of neuromorphic technology and provide an opinion on the challenges and opportunities that the future holds in the major areas of neuromorphic technology, namely materials, devices, neuromorphic circuits, neuromorphic algorithms, applications, and ethics. The Roadmap is a collection of perspectives where leading researchers in the neuromorphic community provide their own view about the current state and the future challenges. We hope that this Roadmap will be a useful resource to readers outside this field, for those who are just entering the field, and for those who are well established in the neuromorphic community. https://doi.org/10.1088/2634-4386/ac4a83

cs.ET↗