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Sudip Shekhar

Publications and source records attributed to Sudip Shekhar.

At least 19 recordsLinked to original sources
arXiv2026

DC-to-GHz Modulation In Microring Modulators Using Ferroelectric Nematic Liquid Crystal-on-Silicon in a Foundry Photonic Process

Silicon-organic hybrid (SOH) platforms exhibit exceptional electro-optic (EO) properties, including high-speed operation, low energy consumption, and compact footprints. However, the absence of a scalable poling method for EO polymers, combined with the slow switching speeds characteristic of liquid crystals, has impeded the integration and compatibility of these materials with commercial silicon photonic foundries. On the other hand, the realization of very-large-scale photonic integrated circuits (PICs) in the native silicon photonics platform itself is impeded by the complexities associated with the wavelength and thermal stabilization for microring modulators (MRMs). This study establishes the foundation for a poling-free, CMOS-compatible SOH MRM platform by exploiting simultaneous AC phase shifts in ferroelectric nematic liquid crystals (FN-LCs). We present the first demonstration of an MRM coated with FN-LC, with both the RF signal and the DC bias applied to the same electrodes, taking advantage of the dual phase shift uniquely available in FN-LC. An EO bandwidth of f$_{-6dB}\approx$ 7.8 GHz is achieved \textendash~ the highest reported value for an SOH MRM to date. As a proof of concept, we demonstrate an approximately linear resonance shift across the full width at half maximum ($\approx$ 150 pm/V), with a static power efficiency of $\approx$ 4.5 nW/$π$ for an MRM occupying a total footprint of $\approx$ 0.084 mm$^2$ and exhibiting an on-chip optical insertion loss of $\approx$ 0.78 dB. Successful infiltration of FN-LC, selectively patterned on top of phase shifters, along with optical input/output channels established using free-form photonic wire bonds, is demonstrated in the proposed PIC.

physics.optics↗
arXiv2026

Neuromorphic Photonic Computing with an Electro-Optic Analog Memory

In neuromorphic photonic systems, device operations are typically governed by analog signals, necessitating digital-to-analog converters (DAC) and analog-to-digital converters (ADC). However, data movement between memory and these converters in conventional von Neumann architectures incur significant energy costs. We propose an analog electronic memory co-located with photonic computing units to eliminate repeated long-distance data movement. Here, we demonstrate a monolithically integrated neuromorphic photonic circuit with on-chip capacitive analog memory and evaluate its performance in machine learning for in situ training and inference using the MNIST dataset. Our analysis shows that integrating analog memory into a neuromorphic photonic architecture can achieve over 26x power savings compared to conventional SRAM-DAC architectures. Furthermore, maintaining a minimum analog memory retention-to-network-latency ratio of 100 maintains >90% inference accuracy, enabling leaky analog memories without substantial performance degradation. This approach reduces reliance on DACs, minimizes data movement, and offers a scalable pathway toward energy-efficient, high-speed neuromorphic photonic computing.

cs.ET↗
arXiv2025

Dynamic Beam-Stabilized, Additive-Printed Flexible Antenna Arrays with On-Chip Rapid Insight Generation

Conformal phased arrays promise shape-changing properties, multiple degrees of freedom to the scan angle, and novel applications in wearables, aerospace, defense, vehicles, and ships. However, they have suffered from two critical limitations. (1) Although most applications require on-the-move communication and sensing, prior conformal arrays have suffered from dynamic deformation-induced beam pointing errors. We introduce a Dynamic Beam-Stabilized (DBS) processor capable of beam adaptation through on-chip real-time control of fundamental gain, phase, and delay for each element. (2) Prior conformal arrays have leveraged additive printing to enhance flexibility, but conventional printable inks based on silver are expensive, and those based on copper suffer from spontaneous metal oxidation that alters trace impedance and degrades beamforming performance. We instead leverage a low-cost Copper Molecular Decomposition (CuMOD) ink with < 0.1% variation per degree C with temperature and strain and correct any residual deformity in real-time using the DBS processor. Demonstrating unified material and physical deformation correction, our CMOS DBS processor is low-power, low-area, and easily scalable due to a tile architecture, thereby ideal for on-device implementations.

eess.SP↗
arXiv2025

Dynamic Beam-Stabilized, Additive-Printed Flexible Antenna Arrays with On-Chip Rapid Insight Generation

Conformal phased arrays promise shape-changing properties, multiple degrees of freedom to the scan angle, and novel applications in wearables, aerospace, defense, vehicles, and ships. However, they have suffered from two critical limitations. (1) Although most applications require on-the-move communication and sensing, prior conformal arrays have suffered from dynamic deformation-induced beam pointing errors. We introduce a Dynamic Beam-Stabilized (DBS) processor capable of beam adaptation through on-chip real-time control of fundamental gain, phase, and delay for each element. (2) Prior conformal arrays have leveraged additive printing to enhance flexibility, but conventional printable inks based on silver are expensive, and those based on copper suffer from spontaneous metal oxidation that alters trace impedance and degrades beamforming performance. We instead leverage a low-cost Copper Molecular Decomposition (CuMOD) ink with < 0.1% variation per degree C with temperature and strain and correct any residual deformity in real-time using the DBS processor. Demonstrating unified material and physical deformation correction, our CMOS DBS processor is low power, low-area, and easily scalable due to a tile architecture, thereby ideal for on-device implementations.

eess.SP↗
arXiv2025

Isolator-Free Laser Operation Enabled by Chip-Scale Reflections in Zero-Process-Change SOI

The isolation-free operation of photonic integrated circuits enables dense integration, reducing packaging costs and complexity. Most isolator replacements require a change in the silicon-on-insulator (SOI) foundry process and suffer from large insertion loss. Most solutions did not integrate the laser, leaving the verification incomplete, and measurements with modulated reflections have also been missing. In this work, we present, for the first time, a zero-process-change silicon photonic (SiP) circuit that, when paired with an integrated distributed-feedback laser (DFB), enhances the DFB's immunity to continuous-wave and modulated parasitic reflections from multiple reflectors. The circuit generates intentional, controlled self-injection to stabilize laser dynamics and maintain operation. The SiP circuit is complemented by an electro-optic feedback loop that dynamically adjusts the self-injection to preserve laser stability. The proposed circuit introduces an insertion loss of 1.5 dB and enables the DFB laser to tolerate back reflections as large as -7 dB and -12 dB from on-chip and off-chip reflectors, respectively. The DFB is hybrid integrated with the SiP chip using a photonic wire bond (PWB). The isolator-free operation of the integrated laser in a high-speed optical link has been demonstrated, highlighting its potential for data communication applications.

physics.optics↗
arXiv2025

GHz-rate optical phase shift in light matter interaction-engineered, silicon-ferroelectric nematic liquid crystals

Organic electro-optic materials have demonstrated promising performance in developing electro-optic phase shifters. Their integration with other silicon photonic processes, nanofabrication complexities, and durability remains to be developed. While the required poling step in electro-optic polymers limits their potential and utilization on a large scale, devices made of paraelectric nematic liquid crystals suffer from slow bandwidth. In ferroelectric nematic liquid crystals, we report an additional GHz-fast phase shift that ultimately allows for significant second-order nonlinear optical coefficients related to the Pockels effect. It avoids poling issues and can pave the way for hybrid silicon-organic systems with CMOS-foundry compatibility. We report DC and AC modulation efficiencies of $\approx$~0.25 V$\cdot$mm (from liquid crystal orientation) and $\approx$~25.7 V$\cdot$mm (from Pockels effect), respectively, an on-chip insertion loss of $\approx$~2.6 dB, and an electro-optic bandwidth of $f_\text{-6dB}$>4.18 GHz, employing improved light-matter interaction in a waveguide architecture that calls for only one lithography step.

physics.optics↗
arXiv2024

Physics to System-level Modeling of Silicon-organic-hybrid Nanophotonic Devices

The continuous growth in data volume has sparked interest in silicon-organic-hybrid nanophotonic devices integrated into silicon photonic integrated circuits (PICs). SOH devices offer improved speed and energy efficiency compared to silicon photonics devices. However, a comprehensive and accurate modeling methodology of SOH devices is lacking. While some preliminary modeling approaches for SOH devices exist, their reliance on theoretical and numerical methodologies, along with a lack of compatibility with electronic design automation (EDA), hinders their seamless and rapid integration with silicon PICs. Here, we develop a phenomenological, building-block-based SOH PICs simulation methodology spanning from the physics to the system level, offering high accuracy, comprehensiveness, and EDA-style compatibility. Our model is also readily integrable and scalable, lending itself to the design of large-scale silicon PICs. Our proposed modeling methodology is agnostic and compatible with any photonics-electronics co-simulation software. We validate this methodology by comparing experimentally demonstrated SOH microring modulators and Mach Zehnder modulators with those obtained through simulation, demonstrating its ability to model various modulator topologies. We also show our methodology's ease and speed in modeling large-scale systems. As an illustrative example, we use our methodology to design and study a 3-channel SOH MRM-based wavelength-division (de)multiplexer, a widely used component in various applications, including neuromorphic computing, data center interconnects, communications, and sensing. Our modeling approach is compatible with other materials exhibiting the Pockels and Kerr effects. To our knowledge, this represents the first comprehensive physics-to-system-level EDA-compatible simulation methodology for SOH modulators.

physics.optics↗
arXiv2024

An integrated evanescent-field biosensor in silicon

Decentralized diagnostic testing that is accurate, portable, quantitative, and capable of making multiple simultaneous measurements of different biomarkers at the point-of-need remains an important unmet need in the post-pandemic world. Resonator-based biosensors using silicon photonic integrated circuits are a promising technology to meet this need, as they can leverage (1) semiconductor manufacturing economies of scale, (2) exquisite optical sensitivity, and (3) the ability to integrate tens to hundreds of sensors on a millimeter-scale photonic chip. However, their application to decentralized testing has historically been limited by the expensive, bulky tunable lasers and alignment optics required for their readout. In this work, we introduce a segmented sensor architecture that addresses this important challenge by facilitating resonance-tracking readout using a fixed-wavelength laser. The architecture incorporates an in-resonator phase shifter modulated by CMOS drivers to periodically sweep and acquire the resonance peak shifts as well as a distinct high-sensitivity sensing region, maintaining high performance at a fraction of the cost and size. We show, for the first time, that fixed-wavelength sensor readout can offer similar performance to traditional tunable laser readout, demonstrating a system limit of detection of 6.1 x 10-5 RIU as well as immunoassay-based detection of the SARS-CoV-2 spike protein. We anticipate that this sensor architecture will open the door to a new data-rich class of portable, accurate, multiplexed diagnostics for decentralized testing.

physics.ins-det↗
arXiv2024

120 GOPS Photonic Tensor Core in Thin-film Lithium Niobate for Inference and in-situ Training

Photonics offers a transformative approach to artificial intelligence (AI) and neuromorphic computing by enabling low-latency, high-speed, and energy-efficient computations. However, conventional photonic tensor cores face significant challenges in constructing large-scale photonic neuromorphic networks. Here, we propose a fully integrated photonic tensor core, consisting of only two thin-film lithium niobate (TFLN) modulators, a III-V laser, and a charge-integration photoreceiver. Despite its simple architecture, it is capable of implementing an entire layer of a neural network with a computational speed of 120 GOPS, while also allowing flexible adjustment of the number of inputs (fan-in) and outputs (fan-out). Our tensor core supports rapid in-situ training with a weight update speed of 60 GHz. Furthermore, it successfully classifies (supervised learning) and clusters (unsupervised learning) 112 * 112-pixel images through in-situ training. To enable in-situ training for clustering AI tasks, we offer a solution for performing multiplications between two negative numbers.

physics.optics↗
arXiv2024

High-Q Slow-Wave Coplanar Waveguides

A comprehensive study of methods of maximizing Q for slow-wave coplanar waveguides is described. In addition to the widths of the signal conductor and coplanar ground lines and the distance between them, the length, spacing and stacking of the metal layers of the substrate shield strips are also shown to be critical in maximizing performance. Measured results from more than 50 different devices show that a 7X increase in the quality factor (e.g., Q > 70 at 24 GHz in 0.18 μm CMOS) is achievable using the optimum topology with optimum dimensions.

physics.app-ph↗
arXiv2024

Enabling data-driven and bidirectional model development in Verilog-A for photonic devices

We present a method to model photonic components in Verilog-A by introducing bidirectional signaling through a single port. To achieve this, the concept of power waves and scattering parameters from electromagnetism are employed. As a consequence, one can simultaneously transmit forward and backward propagating waves on a single wire while also capturing realistic, measurement-backed response of photonic components in Verilog-A. We demonstrate examples to show the efficacy of the proposed technique in accounting for critical effects in photonic integrated circuits such as Fabry-Perot cavity resonance, reflections to lasers, etc. Our solution makes electronic-photonic co-simulation more intuitive and accurate.

cs.ET↗
arXiv2024

Roadmapping the Next Generation of Silicon Photonics

Silicon photonics has developed into a mainstream technology driven by advances in optical communications. The current generation has led to a proliferation of integrated photonic devices from thousands to millions - mainly in the form of communication transceivers for data centers. Products in many exciting applications, such as sensing and computing, are around the corner. What will it take to increase the proliferation of silicon photonics from millions to billions of units shipped? What will the next generation of silicon photonics look like? What are the common threads in the integration and fabrication bottlenecks that silicon photonic applications face, and which emerging technologies can solve them? This perspective article is an attempt to answer such questions. We chart the generational trends in silicon photonics technology, drawing parallels from the generational definitions of CMOS technology. We identify the crucial challenges that must be solved to make giant strides in CMOS-foundry-compatible devices, circuits, integration, and packaging. We identify challenges critical to the next generation of systems and applications - in communication, signal processing, and sensing. By identifying and summarizing such challenges and opportunities, we aim to stimulate further research on devices, circuits, and systems for the silicon photonics ecosystem.

physics.optics↗
arXiv2022

Silicon Photonic Architecture for Training Deep Neural Networks with Direct Feedback Alignment

There has been growing interest in using photonic processors for performing neural network inference operations; however, these networks are currently trained using standard digital electronics. Here, we propose on-chip training of neural networks enabled by a CMOS-compatible silicon photonic architecture to harness the potential for massively parallel, efficient, and fast data operations. Our scheme employs the direct feedback alignment training algorithm, which trains neural networks using error feedback rather than error backpropagation, and can operate at speeds of trillions of multiply-accumulate (MAC) operations per second while consuming less than one picojoule per MAC operation. The photonic architecture exploits parallelized matrix-vector multiplications using arrays of microring resonators for processing multi-channel analog signals along single waveguide buses to calculate the gradient vector for each neural network layer in situ. We also experimentally demonstrate training deep neural networks with the MNIST dataset using on-chip MAC operation results. Our novel approach for efficient, ultra-fast neural network training showcases photonics as a promising platform for executing AI applications.

cs.LG↗
arXiv2022

Enhanced Polling and Infiltration for Highly-Efficient Electro-Optic Polymer-Based Mach-Zehnder Modulators

An ultra-narrow slot waveguide is fabricated for use in highly-efficient, electro-optic-polymer-based, integrated-optic modulators. Measurement results indicate that $V_πL$'s below 1.2 V.mm are possible for balanced Mach-Zehnder modulators using this ultra-narrow slot waveguide on a silicon-organic hybrid platform. Simulated $V_πL$'s of 0.35 V.mm have also been obtained. In addition to adapting standard recipes, we developed two novel fabrication processes for achieving miniaturized devices with high modulation sensitivity. To boost compactness and decrease the overall footprint, we use a fabrication approach based on air bridge interconnects on thick, thermally-reflowed, MaN 2410 E-beam resist protected by an alumina layer. To overcome the challenges of high currents and imperfect infiltration of polymers into ultra-narrow slots, we use a carefully designed, atomically-thin layer of TiO$_2$ as a carrier-barrier to enhance the polling efficiency of our electro-optic polymers. Additionally, finite-difference time-domain simulations are employed to optimize the effect of the thin layer of TiO$_2$. As compared to other, non-optimized, cases, our peak measured current is reduced by a factor of 3; scanning electron microscopy images also demonstrate that we achieve almost perfect infiltration. The anticipated increase in total capacitance due to the TiO$_2$ layer is shown to be negligible. In fact, applying our TiO$_2$ surface treatment to our ultra-narrow slot, allows us to obtain an improved phase shift efficiency ($\partial n / \partial V$) of $\sim$94% for a 10 nm TiO$_2$ layer.

physics.app-ph↗
arXiv2021

Photoconductive Heaters Enable Control of Large-Scale Silicon Photonic Ring Resonator Circuits

A multitude of large-scale silicon photonic systems based on ring resonators have been envisioned for applications ranging from biomedical sensing to quantum computing and machine learning. Yet, due to the lack of a scalable solution for controlling ring resonators, practical demonstrations have been limited to systems with only a few rings. Here, we demonstrate that large systems can be controlled by using only doped waveguide elements inside their ringswhile preserving their area and cost. We measure the large photoconductive changes of the waveguides for monitoring the rings' resonance conditions across high-dynamic ranges and leverage their thermo-optic effects for tuning. This allows us to control ring resonators without requiring additional components, complex tuning algorithms, or additional electrical I/Os. We demonstrate automatic resonance alignment of 31 rings of a 16 x 16 switch and of a 14-ring coupled resonator optical waveguide, making them the largest, yet most compact, automatically controlled silicon ring resonator circuits to date, to the best of our knowledge.

physics.app-ph↗
arXiv2021

Prospects and applications of photonic neural networks

Neural networks have enabled applications in artificial intelligence through machine learning, and neuromorphic computing. Software implementations of neural networks on conventional computers that have separate memory and processor (and that operate sequentially) are limited in speed and energy efficiency. Neuromorphic engineering aims to build processors in which hardware mimics neurons and synapses in the brain for distributed and parallel processing. Neuromorphic engineering enabled by photonics (optical physics) can offer sub-nanosecond latencies and high bandwidth with low energies to extend the domain of artificial intelligence and neuromorphic computing applications to machine learning acceleration, nonlinear programming, intelligent signal processing, etc. Photonic neural networks have been demonstrated on integrated platforms and free-space optics depending on the class of applications being targeted. Here, we discuss the prospects and demonstrated applications of these photonic neural networks.

cs.ET↗
arXiv2019

A 4-Element MIMO Baseband Receiver with >35dB 80MHz Spatial Interference Cancellation

Next-generation communication systems with wide bandwidths need to operate in interference-limited networks. A discrete-time delay (TD) technique in a baseband receiver array is proposed for canceling wide modulated bandwidth spatial interference and reducing the ADC dynamic range requirements. The proposed discrete TD technique first aligns the interference using non-uniform sampled phases followed by uniform cancellation using a Truncated Hadamard Transform implemented with antipodal binary coefficients. A digital timeinterleaver with 5 ps resolution spanning 15 ns implements a scalable discrete TD to compensate the inter-element delay, while the multiply-accumulate in the signal path is simplified by implementing a 1-bit differential truncated Hadamard matrix. Measured results demonstrate greater than 35 dB cancellation over 80 MHz modulated bandwidth in 65 nm CMOS with a 592x improvement over prior-art demonstration of wide modulated bandwidth interference cancellation.

eess.SP↗