arXiv subjects

Sule Ozev

Publications and source records attributed to Sule Ozev.

9 recordsLinked to original sources

arXiv2026

Distributed Delay-Based BIST for Mixed-Signal Circuits in Flexible Electronics

Flexible electronics (FE) based on indium gallium zinc oxide thin-film transistors (IGZO-TFTs) are emerging for ultra-low-power wearable applications. However, lack of packaging, limited pins, and high device variability make conventional Automatic Test Equipment (ATE) impractical for testing analog/mixed-signal circuits in FE. This work presents a dual-purpose ring oscillator (RO) and voltage-controlled oscillator (VCO) serving as functional timing blocks and core structures for a distributed delay-based BIST framework. The oscillators achieve 1100x area reduction and 5600x lower power than previous IGZO-TFT designs. Lightweight digital BIST embedded within each RO stage enables stage-wise delay monitoring for defect detection. The BIST achieves 93% defect coverage for individual defects and 88% for multiple simultaneous defects, with only 3% power overhead

cs.AR↗

arXiv2026

Fault Tolerant Design of IGZO-based Binary Search ADCs

Thin-film technologies such as Indium Gallium Zinc Oxide (IGZO) enable Flexible Electronics (FE) for emerging applications in wearable sensing, personal health monitoring, and large-area systems. Analog-to-digital converters (ADCs) serve as critical sensor interfaces in these systems. Yet, their vulnerability to manufacturing defects remains poorly understood despite unipolar technologies' inherently high defect densities and process variations compared to mature CMOS technologies. We present a hierarchical fault injection framework to characterize defect sensitivity in Binary Search ADCs implemented in n-type only technologies. Our methodology combines transistor-level defect characterization with system-level fault propagation analysis, enabling efficient exploration of both single and multiple fault scenarios across the conversion hierarchy. The framework identifies critical fault-sensitive circuit components and enables selective redundancy strategies targeting only the most sensitive components. The resulting defect-tolerant designs improve fault coverage from 60% to 92% under single-fault injections and from 34% to 77.6% under multi-fault injection, while incurring only 4.2% area overhead and 6% power increase. While validated on IGZO-TFTs, the methodology applies to all emerging unipolar technologies.

cs.AR↗

arXiv2023

Low Overhead RF Impedance Measurement by Using Periodic Structures

Due to the need for higher reliability and performance from RF circuits, multi-port reflectometers are increasingly used as low-overhead impedance monitors. In this work, using periodic structures as multi-ports is proposed. Periodic structures impose a new constraint on the multi-port theory and simplify it significantly. This simplification leads to closed form solution for calibration and measurement procedures. The closed-form solution also shows that any arbitrary periodic structure will always have a unique solution for both procedures. Therefore, the proposed technique does not rely on frequency-dependent behavior of devices, such as directivity and phase shift to measure impedance. This fact leads to increased bandwidth and simplified design procedure. In addition, proposed multi-port structures can be calibrated by using fewer known loads than existing multi-port techniques. This fact, coupled with the closed-form solution, reduces computation overhead and test time. The theory and its robustness against non-idealities, such as part-to-part variation, are verified with Monte-Carlo simulations. A practical embodiment of the technique is demonstrated with EM simulations and hardware experiments. In this embodiment, the multi-port structure is embedded into an LC matching network. Hardware experiments show that the embedded multi-port structure can measure test loads with high accuracy from 1.5 GHz to 3.5 GHz, without degrading matching network performance.

physics.ins-det↗

arXiv2022

Detecting Anomaly in Chemical Sensors via L1-Kernels based Principal Component Analysis

We propose a kernel-PCA based method to detect anomaly in chemical sensors. We use temporal signals produced by chemical sensors to form vectors to perform the Principal Component Analysis (PCA). We estimate the kernel-covariance matrix of the sensor data and compute the eigenvector corresponding to the largest eigenvalue of the covariance matrix. The anomaly can be detected by comparing the difference between the actual sensor data and the reconstructed data from the dominant eigenvector. In this paper, we introduce a new multiplication-free kernel, which is related to the l1-norm for the anomaly detection task. The l1-kernel PCA is not only computationally efficient but also energy-efficient because it does not require any actual multiplications during the kernel covariance matrix computation. Our experimental results show that our kernel-PCA method achieves a higher area under curvature (AUC) score (0.7483) than the baseline regular PCA method (0.7366).

eess.SP↗

arXiv2020

Discrete Cosine Transform Based Causal Convolutional Neural Network for Drift Compensation in Chemical Sensors

Sensor drift is a major problem in chemical sensors that requires addressing for reliable and accurate detection of chemical analytes. In this paper, we develop a causal convolutional neural network (CNN) with a Discrete Cosine Transform (DCT) layer to estimate the drift signal. In the DCT module, we apply soft-thresholding nonlinearity in the transform domain to denoise the data and obtain a sparse representation of the drift signal. The soft-threshold values are learned during training. Our results show that DCT layer-based CNNs are able to produce a slowly varying baseline drift signal. We train the CNN on synthetic data and test it on real chemical sensor data. Our results show that we can have an accurate and smooth drift estimate even when the observed sensor signal is very noisy.

eess.SP↗

arXiv2019

Detecting Gas Vapor Leaks Using Uncalibrated Sensors

Chemical and infra-red sensors generate distinct responses under similar conditions because of sensor drift, noise or resolution errors. In this work, we use different time-series data sets obtained by infra-red and E-nose sensors in order to detect Volatile Organic Compounds (VOCs) and Ammonia vapor leaks. We process time-series sensor signals using deep neural networks (DNN). Three neural network algorithms are utilized for this purpose. Additive neural networks (termed AddNet) are based on a multiplication-devoid operator and consequently exhibit energy-efficiency compared to regular neural networks. The second algorithm uses generative adversarial neural networks so as to expose the classifying neural network to more realistic data points in order to help the classifier network to deliver improved generalization. Finally, we use conventional convolutional neural networks as a baseline method and compare their performance with the two aforementioned deep neural network algorithms in order to evaluate their effectiveness empirically.

eess.SP↗

arXiv2019

An In-Field Programmable Adaptive CMOS LNA for Intelligent IOT Sensor Node Applications

As the Internet of Things (IOT) is growing rapidly, there is an emerging need to facilitate development of IOT devices in the design cycle while optimized performance is obtained in the field of operation. This paper develops reconfiguration approaches that enable post-production adaptation of circuit performance to enable RF IC re-use across different IOT applications. An adaptable low noise amplifier is designed and fabricated in 130nm CMOS technology to investigate the post-production reconfiguration concept. A statistical model that relates circuit-level reconfiguration parameters to circuit performances is generated by characterizing a limited number of samples. This model is used to predict the performance parameters of the device in the field. The estimation error for LNA performance parameters are obtained in the simulation environment as well as chip measurements.

eess.SP↗

arXiv2007

Test Planning for Mixed-Signal SOCs with Wrapped Analog Cores

Many SOCs today contain both digital and analog embedded cores. Even though the test cost for such mixed-signal SOCs is significantly higher than that for digital SOCs, most prior research in this area has focused exclusively on digital cores. We propose a low-cost test development methodology for mixed-signal SOCs that allows the analog and digital cores to be tested in a unified manner, thereby minimizing the overall test cost. The analog cores in the SOC are wrapped such that they can be accessed using a digital test access mechanism (TAM). We evaluate the impact of the use of analog test wrappers on area overhead and test time. To reduce area overhead, we present an analog test wrapper optimization technique, which is then combined with TAM optimization in a cost-oriented heuristic approach for test scheduling. We also demonstrate the feasibility of using analog wrappers by presenting transistor-level simulations for an analog wrapper and a representative core. We present experimental results on test scheduling for an ITC'02 benchmark SOC that has been augmented with five analog cores.

cs.AR↗

arXiv2007

Circuit-Level Modeling for Concurrent Testing of Operational Defects due to Gate Oxide Breakdown

As device sizes shrink and current densities increase, the probability of device failures due to gate oxide breakdown (OBD) also increases. To provide designs that are tolerant to such failures, we must investigate and understand the manifestations of this physical phenomenon at the circuit and system level. In this paper, we develop a model for operational OBD defects, and we explore how to test for faults due to OBD. For a NAND gate, we derive the necessary input conditions that excite and detect errors due to OBD defects at the gate level. We show that traditional pattern generators fail to exercise all of these defects. Finally, we show that these test patterns can be propagated and justified for a combinational circuit in a manner similar to traditional ATPG.

cs.AR↗