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Sunil Rudresh

Publications and source records attributed to Sunil Rudresh.

4 recordsLinked to original sources

Time Encoding of Finite-Rate-of-Innovation Signals

Time-encoding of continuous-time signals is an alternative sampling paradigm to conventional methods such as Shannon's sampling. In time-encoding, the signal is encoded using a sequence of time instants where an event occurs, and hence fall under event-driven sampling methods. Time-encoding can be designed agnostic to the global clock of the sampling hardware, which makes sampling asynchronous. Moreover, the encoding is sparse. This makes time-encoding energy efficient. However, the signal representation is nonstandard and in general, nonuniform. In this paper, we consider time-encoding of finite-rate-of-innovation signals, and in particular, periodic signals composed of weighted and time-shifted versions of a known pulse. We consider encoding using both crossing-time-encoding machine (C-TEM) and integrate-and-fire time-encoding machine (IF-TEM). We analyze how time-encoding manifests in the Fourier domain and arrive at the familiar sum-of-sinusoids structure of the Fourier coefficients that can be obtained starting from the time-encoded measurements via a suitable linear transformation. Thereafter, standard FRI techniques become applicable. Further, we extend the theory to multichannel time-encoding such that each channel operates with a lower sampling requirement. We also study the effect of measurement noise, where the temporal measurements are perturbed by additive noise. To combat the effect of noise, we propose a robust optimization framework to simultaneously denoise the Fourier coefficients and estimate the annihilating filter accurately. We provide sufficient conditions for time-encoding and perfect reconstruction using C-TEM and IF-TEM, and furnish extensive simulations to substantiate our findings.

eess.SP

Unlimited Dynamic Range Analog-to-Digital Conversion

Analog-to-digital converters (ADCs) provide the link between continuous-time signals and their discrete-time counterparts, and the Shannon-Nyquist sampling theorem provides the mathematical foundation. Real-world signals have a variable amplitude range, whereas ADCs, by design, have a limited input dynamic range, which results in out-of-range signals getting clipped. In this paper, we propose an unlimited dynamic range ADC (UDR-ADC) that is based on the modulo operation (self-reset feature) to alleviate the problem of clipping. The self-reset feature allows for wrapping of the input amplitudes, which preserves the input dynamic range. We present the signal model and a reconstruction technique to recover the original signal samples from the modulo measurements. We validate the operation of the proposed ADC using circuit simulations in 65 nm complementary metal-oxide-semiconductor (CMOS) process technology. The validation is supplemented by a hardware prototype designed using discrete components. A performance assessment in terms of area, power requirement, and the signal-to-quantization-noise ratio (SQNR) shows that the UDR-ADC outperforms the standard ones.

eess.SP

Generalized Design of Sampling Kernels for 2-D FRI Signals

One of the interesting problems in the finite-rate-of-innovation signal sampling framework is the design of compactly supported sampling kernels. In this paper, we present a generic framework for designing sampling kernels in 2-D. We consider both separable and nonseparable kernels. The design is carried out in the frequency domain, where a set of alias cancellation conditions are imposed on the kernel's frequency response. The Paley-Wiener theorem for 2-D signals is invoked to arrive at admissible kernels with a compact support. As a specific case, we show that a certain separable extension of the 1-D design framework results in 2-D sum-of-modulated-spline (SMS) kernels. Similar to their 1-D counterparts, the 2-D SMS kernels have the attractive feature of reproducing a class of 2-D polynomial-modulated exponentials of a desired order. Also, the support of the kernels is independent of the order. The design framework is generic and also allows one to design nonseparable sampling kernels. To this end, we demonstrate the design of a nonseparable kernel and present simulation results.

eess.SP

Epoch-Synchronous Overlap-Add (ESOLA) for Time- and Pitch-Scale Modification of Speech Signals

Time- and pitch-scale modifications of speech signals find important applications in speech synthesis, playback systems, voice conversion, learning/hearing aids, etc.. There is a requirement for computationally efficient and real-time implementable algorithms. In this paper, we propose a high quality and computationally efficient time- and pitch-scaling methodology based on the glottal closure instants (GCIs) or epochs in speech signals. The proposed algorithm, termed as epoch-synchronous overlap-add time/pitch-scaling (ESOLA-TS/PS), segments speech signals into overlapping short-time frames and then the adjacent frames are aligned with respect to the epochs and the frames are overlap-added to synthesize time-scale modified speech. Pitch scaling is achieved by resampling the time-scaled speech by a desired sampling factor. We also propose a concept of epoch embedding into speech signals, which facilitates the identification and time-stamping of samples corresponding to epochs and using them for time/pitch-scaling to multiple scaling factors whenever desired, thereby contributing to faster and efficient implementation. The results of perceptual evaluation tests reported in this paper indicate the superiority of ESOLA over state-of-the-art techniques. ESOLA significantly outperforms the conventional pitch synchronous overlap-add (PSOLA) techniques in terms of perceptual quality and intelligibility of the modified speech. Unlike the waveform similarity overlap-add (WSOLA) or synchronous overlap-add (SOLA) techniques, the ESOLA technique has the capability to do exact time-scaling of speech with high quality to any desired modification factor within a range of 0.5 to 2. Compared to synchronous overlap-add with fixed synthesis (SOLAFS), the ESOLA is computationally advantageous and at least three times faster.

eess.AS