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Tengji Xu

Publications and source records attributed to Tengji Xu.

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Beyond Terabit/s Integrated Neuromorphic Photonic Processor for DSP-Free Optical Interconnects

The rapid expansion of generative AI drives unprecedented demands for high-performance computing. Training large-scale AI models now requires vast interconnected GPU clusters across multiple data centers. Multi-scale AI training and inference demand uniform, ultra-low latency, and energy-efficient links to enable massive GPUs to function as a single cohesive unit. However, traditional electrical and optical interconnects, relying on conventional digital signal processors (DSPs) for signal distortion compensation, increasingly fail to meet these stringent requirements. To overcome these limitations, we present an integrated neuromorphic optical signal processor (OSP) that leverages deep reservoir computing and achieves DSP-free, all-optical, real-time processing. Experimentally, our OSP achieves a 100 Gbaud PAM4 per lane, 1.6 Tbit/s data center interconnect over a 5 km optical fiber in the C-band (equivalent to over 80 km in the O-band), far exceeding the reach of state-of-the-art DSP solutions, which are fundamentally constrained by chromatic dispersion in IMDD systems. Simultaneously, it reduces processing latency by four orders of magnitude and energy consumption by three orders of magnitude. Unlike DSPs, which introduce increased latency at high data rates, our OSP maintains consistent, ultra-low latency regardless of data rate scaling, making it ideal for future optical interconnects. Moreover, the OSP retains full optical field information for better impairment compensation and adapts to various modulation formats, data rates, and wavelengths. Fabricated using a mature silicon photonic process, the OSP can be monolithically integrated with silicon photonic transceivers, enhancing the compactness and reliability of all-optical interconnects. This research provides a highly scalable, energy-efficient, and high-speed solution, paving the way for next-generation AI infrastructure.

physics.optics

Online training and pruning of multi-wavelength photonic neural networks

CMOS-compatible photonic integrated circuits (PICs) are emerging as a promising platform in artificial intelligence (AI) computing. Owing to the compact footprint of microring resonators (MRRs) and the enhanced interconnect efficiency enabled by wavelength division multiplexing (WDM), MRR-based photonic neural networks (PNNs) are particularly promising for large-scale integration. However, the scalability and energy efficiency of such systems are fundamentally limited by the MRR resonance wavelength variations induced by fabrication process variations (FPVs) and environmental fluctuations. Existing solutions use post-fabrication approaches or thermo-optic tuning, incurring high control power and additional process complexity. In this work, we introduce an online training and pruning method that addresses this challenge, adapting to FPV-induced and thermally induced shifts in MRR resonance wavelength. By incorporating a power-aware pruning term into the conventional loss function, our approach simultaneously optimizes the PNN accuracy and the total power consumption for MRR tuning. In proof-of-concept on-chip experiments on the Iris dataset, our system PNNs can adaptively train to maintain a 96% classification accuracy, while achieving a 44.7% reduction in tuning power via pruning. Additionally, our approach reduces the power consumption by orders-of-magnitude on larger datasets. By addressing chip-to-chip variation and minimizing power requirements, our approach significantly improves the scalability and energy efficiency of MRR-based integrated analog photonic processors, paving the way for large-scale PICs to enable versatile applications including neural networks, photonic switching, LiDAR, and radio-frequency beamforming.

physics.optics

Perfecting Imperfect Physical Neural Networks with Transferable Robustness using Sharpness-Aware Training

AI models are essential in science and engineering, but recent advances are pushing the limits of traditional digital hardware. To address these limitations, physical neural networks (PNNs), which use physical substrates for computation, have gained increasing attention. However, developing effective training methods for PNNs remains a significant challenge. Current approaches, regardless of offline and online training, suffer from significant accuracy loss. Offline training is hindered by imprecise modeling, while online training yields device-specific models that can't be transferred to other devices due to manufacturing variances. Both methods face challenges from perturbations after deployment, such as thermal drift or alignment errors, which make trained models invalid and require retraining. Here, we address the challenges with both offline and online training through a novel technique called Sharpness-Aware Training (SAT), where we innovatively leverage the geometry of the loss landscape to tackle the problems in training physical systems. SAT enables accurate training using efficient backpropagation algorithms, even with imprecise models. PNNs trained by SAT offline even outperform those trained online, despite modeling and fabrication errors. SAT also overcomes online training limitations by enabling reliable transfer of models between devices. Finally, SAT is highly resilient to perturbations after deployment, allowing PNNs to continuously operate accurately under perturbations without retraining. We demonstrate SAT across three types of PNNs, showing it is universally applicable, regardless of whether the models are explicitly known. This work offers a transformative, efficient approach to training PNNs, addressing critical challenges in analog computing and enabling real-world deployment.

physics.optics

High-precision programming of large-scale ring resonator circuits with minimal pre-calibration

Microring resonators (MRRs) are essential components in large-scale photonic integrated circuits (PICs), but programming these circuits with high precision and efficiency remains an unsolved challenge. Conventional methods rely on complex calibration processes that are both time-consuming and often inaccurate, limiting the scalability of PICs. This work introduces an innovative control method called chip-in-the-loop optimization (ChiL) that addresses this challenge by offering high scalability, precision, fast convergence, and robustness. ChiL reduces the calibration complexity for an $N$ devices system from $O(k^N)$ to a single-shot measurement, while maintaining a record-high precision over 9-bit in the presence of system imperfections, including fabrication variances, thermal crosstalk, and temperature drift. Using ChiL, we experimentally demonstrate a photonic solver for computing matrix eigenvalues and eigenvectors with errors on the order of $10^{-4}$. Additionally, we achieve a photonic neural network (PNN) with accuracy and a confusion matrix identical to those of digital computers. ChiL offers a practical approach for programming large-scale PICs and bridges the gap between analog photonic and digital electronic computing and signal processing in both scale and precision.

physics.optics

Control-free and efficient integrated photonic neural networks via hardware-aware training and pruning

Integrated photonic neural networks (PNNs) are at the forefront of AI computing, leveraging on light's unique properties, such as large bandwidth, low latency, and potentially low power consumption. Nevertheless, the integrated optical components within PNNs are inherently sensitive to external disturbances and thermal interference, which can detrimentally affect computing accuracy and reliability. Current solutions often use complicated control methods, resulting in high hardware complexity impractical for large-scale PNNs. In response, we propose a novel hardware-aware training and pruning approach. The core idea is to train the parameters of a physical neural network towards its noise-robust and energy-efficient region. This innovation enables control-free and energy-efficient photonic computing. Our method is validated across diverse integrated PNN architectures. Through experimental validation, our approach significantly enhances the computing precision of MRR-based PNN, achieving a notable 4-bit improvement without the need for complex device control mechanisms or energy-intensive temperature stabilization circuits. Specifically, it improves the accuracy of experimental handwritten digit classification from 67.0% to 95.0%, nearing theoretical limits and achieved without a thermoelectric controller. Additionally, this approach reduces the energy by tenfold. We further extend the validation to various architectures, such as PCM-based PNN, demonstrating the broad applicability of our approach across different platforms. This advancement represents a significant step towards the practical, energy-efficient, and noise-resilient implementation of large-scale integrated PNNs.

physics.optics