arXiv subjects

Tetsuro Yamazaki

Publications and source records attributed to Tetsuro Yamazaki.

3 recordsLinked to original sources

arXiv2026

Pitfalls in VM Implementation on CHERI: Lessons from Porting CRuby

CHERI (Capability Hardware Enhanced RISC Instructions) is a novel hardware designed to address memory safety issues. By replacing traditional pointers with hardware capabilities, it enhances security in modern software systems. A Virtual Machine (VM) is one such system that can benefit from CHERI's protection, as it may contain latent memory vulnerabilities. However, developing and porting VMs to CHERI is a non-trivial task. There are many subtle pitfalls from the assumptions on the undefined behaviors of the C language made based on conventional architectures. Those assumptions conflict with CHERI's stricter memory safety model, causing unexpected failures. Although several prior works have discussed the process of porting VMs, they focus on the overall porting process instead of the pitfalls for VM implementation on CHERI. The guide for programming in CHERI exists, but it is for general programming, not addressing VM-specific issues. We have ported CRuby to CHERI as a case study and surveyed previous works on porting VMs to CHERI. We categorized and discussed the issues found based on their causes. In this paper, we illustrate the VM-specific pitfalls for each category. Most of the pitfalls arise from the undefined behaviors in the C language; in particular, implementation techniques and idioms of VMs often assume behaviors of traditional architectures that are invalid on CHERI. We also discuss workarounds for them and the impacts of those workarounds. We verified the validity of the workarounds by applying them to our CRuby port and by surveying the codebases of prior case studies. This work contributes to the body of knowledge on developing and porting VMs to CHERI and will help guide efforts toward constructing safer VMs.

cs.PL↗

arXiv2026

Efficient Selection of Type Annotations for Performance Improvement in Gradual Typing

Gradual typing has gained popularity as a design choice for integrating static and dynamic typing within a single language. Several practical languages have adopted gradual typing to offer programmers the flexibility to annotate their programs as needed. Meanwhile there is a key challenge of unexpected performance degradation in partially typed programs. The execution speed may significantly decrease when simply adding more type annotations. Prior studies have investigated strategies of selectively adding type annotations for better performance. However, they are restricted in substantial compilation time, which impedes the practical usage. This paper presents a new technique to select a subset of type annotations derived by type inference for improving the execution performance of gradually typed programs. The advantage of the proposal is shorter compilation time by employing a lightweight, amortized approach. It selects type annotations along the data flows, which is expected to avoid expensive runtime casts caused by a value repeatedly crossing the boundaries between untyped and typed code. We demonstrate the applicability of our proposal, and conduct experiments to validate its effectiveness of improving the execution time on Reticulated Python. Our implementation supports a Python subset to select type annotations derived by an implemented, external type inference engine. Experiment results show that our proposal outperforms a naive strategy of using all type annotations derived by type inference among the benchmark programs. In comparison with an existing approach, the proposal achieves comparable execution speed and shows advantage of maintaining a more stable compilation time of deriving and selecting type annotations. Our results empirically indicate that the proposed technique is practical within Reticulated Python for mitigating the performance bottleneck of gradually typed programs.

cs.PL↗

arXiv2025

BlueScript: A Disaggregated Virtual Machine for Microcontrollers

Virtual machines (VMs) are highly beneficial for microcontroller development. In particular, interactive programming environments greatly facilitate iterative development processes, and higher execution speeds expand the range of applications that can be developed. However, due to their limited memory size, microcontroller VMs provide a limited set of features. Widely used VMs for microcontrollers often lack interactive responsiveness and/or high execution speed. While researchers have investigated offloading certain VM components to other machines,the types of components that can be offloaded are still restricted. In this paper, we propose a disaggregated VM that offloads as many components as possible to a host machine. This makes it possible to exploit the abundant memory of the host machine and its powerful processing capability to provide rich features through the VM. As an instance of a disaggregated VM, we design and implement a BlueScript VM. The BlueScript VM is a virtual machine for microcontrollers that provides an interactive development environment. We offload most of the components of the BlueScript VM to a host machine. To reduce communication overhead between the host machine and the microcontroller, we employed a data structure called a shadow machine on the host machine, which mirrors the execution state of the microcontroller. Through our experiments, we confirmed that offloading components does not seriously compromise their expected benefits. We assess that an offloaded incremental compiler results in faster execution speed than MicroPython and Espruino, while keeping interactivity comparable with MicroPython. In addition, our experiments observe that the offloaded dynamic compiler improves VM performance. Through this investigation, we demonstrate the feasibility of providing rich features even on VMs for memory-limited microcontrollers.

cs.PL↗