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Tharanga R. Nanayakkara

Publications and source records attributed to Tharanga R. Nanayakkara.

3 recordsLinked to original sources

Phase Formation and Thermal Stability of Superconducting Platinum Silicide Thin Films on Silicon

Platinum silicide (PtSi) thin films are promising for silicon-based superconducting quantum devices due to their compatibility with CMOS fabrication, air stability, and superconducting transition temperature near 1 K. We report a systematic study of PtSi phase formation, microstructure, and interface quality as a function of annealing temperature and duration, characterizing films using grazing-incidence X-ray diffraction, X-ray reflectivity, and electrical transport measurements. Phase-pure PtSi forms within minutes by rapid thermal processing at 600 °C and is stable under extended annealing, while 30 s anneals across 300-600 °C yield equivalent film quality with consistent microstructure and superconducting properties. X-ray reflectivity reveals that interfacial roughening is an intrinsic consequence of the Pt2Si-to-PtSi conversion step rather than a result of elevated temperature or prolonged annealing. These results establish a robust processing window for PtSi formation in silicon-based superconducting device fabrication flows.

cond-mat.supr-con↗

Tantalum Damascene Coplanar Waveguide Resonators Fabricated Using 300 mm Scale Processes

Surface oxides contribute to losses in superconducting transmon devices resulting in degraded performance. We explore the use of the damascene process to replace the sidewall native oxide of a device with a metal/substrate interface. We simulate sidewall oxidation by burying an oxide layer during fabrication. We observe a modest improvement between the two types of devices, which is suggestive of a reduction in the surface participation ratio.

quant-ph↗

Effects of Integrated Heatsinking on Superconductivity in Tantalum Nitride Nanowires at the 300 Millimeter Scale

We report the superconducting properties of tantalum nitride (TaN) nanowires and TaN/copper (TaN/Cu) bilayer nanowires fabricated on 300 mm silicon wafers using CMOS-compatible processes. We evaluate how an integrated Cu heatsink modifies the superconducting response of TaN nanowires by improving thermal dissipation without significantly compromising key superconducting parameters. Through analysis of hysteresis in current-voltage curves, we demonstrate that Cu integration improves heat dissipation, supporting expectations of faster reset times in superconducting nanowire single-photon detectors (SNSPDs), consistent with enhanced heat transfer away from the hot spot. Using the Skocpol-Beasley-Tinkham (SBT) hotspot model, we quantify the Cu-enabled improvement in heat transfer as an approximately 100x increase in the SBT slope parameter beta and effective interfacial heat-transfer efficiency compared to TaN nanowires. The near-unity ratio of critical to retrapping current in TaN/Cu bilayer nanowires provides another evidence of efficient heat removal enabled by the integrated Cu layer. Our results show a zero-temperature Ginzburg-Landau coherence length of 7 nm and a critical temperature of 4.1 K for 39 nm thick TaN nanowires. The nanowires show <5% variation in critical dimensions, room-temperature resistance, residual resistance ratio, critical temperature, and critical current across the 300 mm wafer for all measured linewidths, demonstrating excellent process uniformity and scalability. These results indicate the trade-offs between superconducting performance and heat-sinking efficiency in TaN/Cu bilayer nanowires. They also underscore the viability of wafer-scale fabrication for fast, large-area SNSPD arrays for applications in photonic quantum computing, cosmology, and neuromorphic computing devices.

cond-mat.supr-con↗