Plasma Etch Process Optimization for Photonic-Grade Diamond-on-Insulator Substrates and Thickness Evaluation using Colorimetry
Diamond color-center qubits integrated with photonic circuits can be initialized, manipulated, entangled, and read individually with high fidelity, making them attractive for large-scale modular quantum computers, quantum networks, and distributed quantum sensing. However, the limited size of heteroepitaxially grown single-crystal diamond (SCD) and photonic-grade diamond-on-insulator (DOI) substrates remains a challenge for integration with existing manufacturing processes. Here, we develop a plasma etch recipe to thin direct-bonded (100) SCD membranes (<50 $μ$m) into large-area, thin-film DOI substrates, and demonstrate free-standing photonic chiplets fabricated from the resulting DOI. The ICP-RIE recipe preserves diamond bonding, provides sufficient micromasking and surface-quality control, and enables thin-film DOI manufacture. We thin a 10 $μ$m diamond plate bonded to SiO$_2$/Si and obtain a photonic-grade DOI substrate with diamond thickness $\leq$300 nm. The DOI film is around 300 nm thick over 0.5 $\times$ 0.5 mm$^2$, with surface roughness < 0.5 nm, while the bonding interface remains intact. Diamond photonic chiplets are fabricated on this DOI substrate using a standard two-step lithography process, without complex thin-film transfer, under-etching, or pedestal formation. We also present a colorimetric study of diamond visibility on SiO$_2$ and quantify color differences across thicknesses in common colorimetric spaces. This analysis enables automatic diamond-thickness extrapolation from standard optical microscope images with 5 nm resolution, in good agreement with white-light interferometry (WLI) measurements. The DOI substrate and colorimetric thickness-evaluation method provide an effective fabrication platform and reliable validation route for scalable manufacturing of diamond nanophotonic devices, opening a path toward large-scale integrated quantum systems.