arXiv subjects

Tim Jackman

Publications and source records attributed to Tim Jackman.

3 recordsLinked to original sources

arXiv2026

Constructive Separations from Gate Elimination

Gate elimination is the primary technique for proving explicit lower bounds against general Boolean circuits, including Li and Yang's state-of-the-art $3.1n - o(n)$ bound for affine dispersers (STOC 2022). Every circuit lower bound is implicitly existential: every circuit that is too small to compute $f$ must err on some input. This raises a natural question: are these lower bounds \emph{constructive}? That is, can we efficiently produce such errors? Chen, Jin, Santhanam, and Williams showed that constructivity plays a central role in many longstanding open problems in complexity theory, and explicitly raised the question of which circuit lower bound techniques can be made constructive (FOCS 2021). We show that a variety of gate elimination arguments yield refuters -- efficient algorithms that, when given a circuit that is too small to compute a function $f$, produce an input on which the circuit errs. Our results range from elementary lower bounds for $XOR$ and the multiplexer to more sophisticated arguments for affine dispersers. Underlying these results is a shift in perspective: gate elimination arguments \emph{are} algorithms. Each step either simplifies the circuit or reveals a violation of some structural or functional property, from which, with a little additional work, explicit counterexamples can be extracted. We further strengthen the $XOR$ result to handle circuits that \emph{match} the lower bound: given any DeMorgan circuit of size $3(n-1)$ that fails to compute $XOR_n$, we can efficiently produce a counterexample. While refuters follow from the gate elimination arguments themselves, this refinement requires a complete characterization of the set of optimal circuits computing $XOR$ -- a requirement rarely met by other explicit functions.

cs.CC↗

arXiv2026

Convergent Gate Elimination and Constructive Circuit Lower Bounds

Towards better understanding of gate elimination, the only method known that can prove complexity lower bounds for explicit functions against unrestricted Boolean circuits, this work contributes: (1) formalizing circuit simplifications as a convergent term graph rewriting system and (2) giving a simple and constructive proof of a classical lower bound using this system. First, we show that circuit simplification is a convergent term graph rewriting system over the DeMorgan and $\{\land, \lor, \oplus\}$ bases. We define local rewriting rules from Boolean identities such that every simplification sequence yields an identical final result (up to circuit isomorphism or bisimulation). Convergence enables rigorous reasoning about structural properties of simplified circuits without dependence on the order of simplification. Then, we show that there is \emph{no similar} convergent formalization of circuit simplification over the $U_2$ and $B_2$ bases. Then, we use our simplification system to give a constructive circuit lower bound, generalizing Schnorr's classical result that the XOR function requires $3(n - 1)$ gates to compute in the DeMorgan basis. A constructive lower bound $f \not\in C$ gives an algorithm (called a "refuter") that efficiently finds counter-examples for every $C$-circuit trying to compute the function $f$. Chen, Jin, Santhanam, and Williams showed that constructivity plays a central role in many longstanding open problems about complexity theory (FOCS 2021), so it is natural to ask for constructive circuit lower bounds from gate elimination arguments. This demonstrates how using convergent simplification can lead to shorter and more modular proofs of circuit lower bounds. Furthermore, until this work, no constructive lower bound had been proved via gate elimination.

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arXiv2025

Simple Circuit Extensions for XOR in PTIME

The Minimum Circuit Size Problem for Partial Functions ($MCSP^*$) is hard assuming the Exponential Time Hypothesis (ETH) (Ilango, 2020). This breakthrough hardness result leveraged a characterization of the optimal $\{\land, \lor, \neg\}$ circuits for $n$-bit $OR$ ($OR_n$) and a reduction from the partial $f$-Simple Extension Problem where $f = OR_n$. It remains open to extend that reduction to show ETH-hardness of total $MCSP$. However, Ilango observed that the total $f$-Simple Extension Problem is easy whenever $f$ is computed by read-once formulas (like $OR_n$). Therefore, extending Ilango's proof to total $MCSP$ would require one to replace $OR_n$ with a slightly more complex but similarly well-understood Boolean function. This work shows that the $f$-Simple Extension problem remains easy when $f$ is the next natural candidate: $XOR_n$. We first develop a fixed-parameter tractable algorithm for the $f$-Simple Extension Problem that is efficient whenever the optimal circuits for $f$ are (1) linear in size, (2) polynomially "few" and efficiently enumerable in the truth-table size (up to isomorphism and permutation of inputs), and (3) all have constant bounded fan-out. $XOR_n$ satisfies all three of these conditions. When $\neg$ gates count towards circuit size, optimal $XOR_n$ circuits are binary trees of $n-1$ subcircuits computing $(\neg)XOR_2$ (Kombarov, 2011). We extend this characterization when $\neg$ gates do not contribute the circuit size. Thus, the $XOR$-Simple Extension Problem is in polynomial time under both measures of circuit complexity.

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