Timo D. Hämäläinen

arXiv2026

Bringing Chip Tapeout Into University Education

Providing students with experience from chip specification to fabricated silicon can strengthen chip-design education, but integrating tapeout into regular teaching is difficult to scale, especially across universities with different curricula, schedules, regulations, and technical infrastructures. This article discusses the implementation experience and lessons learned from a cross-university approach developed within the Edu4Chip European project. The approach combines aligned learning outcomes, local Master's implementations, and a shared design-to-silicon framework across five European universities.

cs.CY↗

arXiv2017

The effect of hardware-computed travel-time on localization accuracy in the inversion of experimental (acoustic) waveform data

This study aims to advance hardware-level computations for travel-time tomography applications in which the wavelength is close to the diameter of the information that has to be recovered. Such can be the case, for example, in the imaging applications of (1) biomedical physics, (2) astro-geophysics and (3) civil engineering. Our aim is to shed light on the effect of that preprocessing the digital waveform signal has on the inversion results and to find computational solutions that guarantee robust inversion when there are incomplete and/or noisy measurements. We describe a hardware-level implementation for integrated and thresholded travel-time computation (ITT and TTT). We compare the ITT and TTT approaches in inversion analysis with experimental acoustic travel-time data recorded using a ring geometry for the transmission and measurement points. The results obtained suggest that ITT is essential for maintaining the robustness of the inversion with imperfect signal digitization and sparsity. In order to ensure the relevance of the results, the specifications of the test setup were related to those of applications (1)-(3).

astro-ph.IM↗