arXiv subjects

Timothy Proctor

Publications and source records attributed to Timothy Proctor.

At least 37 records · Page 2Linked to original sources

arXiv2024

Measuring error rates of mid-circuit measurements

High-fidelity mid-circuit measurements, which read out the state of specific qubits in a multiqubit processor without destroying them or disrupting their neighbors, are a critical component for useful quantum computing. They enable fault-tolerant quantum error correction, dynamic circuits, and other paths to solving classically intractable problems. But there are almost no methods to assess their performance comprehensively. We address this gap by introducing the first randomized benchmarking protocol that measures the rate at which mid-circuit measurements induce errors in many-qubit circuits. Using this protocol, we detect and eliminate previously undetected measurement-induced crosstalk in a 20-qubit trapped-ion quantum computer. Then, we use the same protocol to measure the rate of measurement-induced crosstalk error on a 27-qubit IBM Q processor, and quantify how much of that error is eliminated by dynamical decoupling.

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arXiv2024

Pauli Noise Learning for Mid-Circuit Measurements

Current benchmarks for mid-circuit measurements (MCMs) are limited in scalability or the types of error they can quantify, necessitating new techniques for quantifying their performance. Here, we introduce a theory for learning Pauli noise in MCMs and use it to create MCM cycle benchmarking, a scalable method for benchmarking MCMs. MCM cycle benchmarking extracts detailed information about the rates of errors in randomly compiled layers of MCMs and Clifford gates, and we demonstrate how its results can be used to quantify correlated errors during MCMs on current quantum hardware. Our method can be integrated into existing Pauli noise learning techniques to scalably characterize and benchmark wide classes of circuits containing MCMs.

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arXiv2024

Fully scalable randomized benchmarking without motion reversal

We introduce binary randomized benchmarking (BiRB), a protocol that streamlines traditional RB by using circuits consisting almost entirely of i.i.d. layers of gates. BiRB reliably and efficiently extracts the average error rate of a Clifford gate set by sending tensor product eigenstates of random Pauli operators through random circuits with i.i.d. layers. Unlike existing RB methods, BiRB does not use motion reversal circuits -- i.e., circuits that implement the identity (or a Pauli) operator -- which simplifies both the method and the theory proving its reliability. Furthermore, this simplicity enables scaling BiRB to many more qubits than the most widely-used RB methods.

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arXiv2024

A Comprehensive Cross-Model Framework for Benchmarking the Performance of Quantum Hamiltonian Simulations

Quantum Hamiltonian simulation is one of the most promising applications of quantum computing and forms the basis for many quantum algorithms. Benchmarking them is an important gauge of progress in quantum computing technology. We present a methodology and software framework to evaluate various facets of the performance of gate-based quantum computers on Trotterized quantum Hamiltonian evolution. We propose three distinct modes for benchmarking: (i) comparing simulation on a real device to that on a noiseless classical simulator, (ii) comparing simulation on a real device with exact diagonalization results, and (iii) using scalable mirror circuit techniques to assess hardware performance in scenarios beyond classical simulation methods. We demonstrate this framework on five Hamiltonian models from the HamLib library: the Fermi and Bose-Hubbard models, the transverse field Ising model, the Heisenberg model, and the Max3SAT problem. Experiments were conducted using Qiskit's Aer simulator, BlueQubit's CPU cluster and GPU simulators, and IBM's quantum hardware. Our framework, extendable to other Hamiltonians, provides comprehensive performance profiles that reveal hardware and algorithmic limitations and measure both fidelity and execution times, identifying crossover points where quantum hardware outperforms CPU/GPU simulators.

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arXiv2023

Scalable Full-Stack Benchmarks for Quantum Computers

Quantum processors are now able to run quantum circuits that are infeasible to simulate classically, creating a need for benchmarks that assess a quantum processor's rate of errors when running these circuits. Here, we introduce a general technique for creating efficient benchmarks from any set of quantum computations, specified by unitary circuits. Our benchmarks assess the integrated performance of a quantum processor's classical compilation algorithms and its low-level quantum operations. Unlike existing "full-stack benchmarks", our benchmarks do not require classical simulations of quantum circuits, and they use only efficient classical computations. We use our method to create randomized circuit benchmarks, including a computationally efficient version of the quantum volume benchmark, and an algorithm-based benchmark that uses Hamiltonian simulation circuits. We perform these benchmarks on IBM Q devices and in simulations, and we compare their results to the results of existing benchmarking methods.

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arXiv2023

Benchmarking quantum logic operations relative to thresholds for fault tolerance

Contemporary methods for benchmarking noisy quantum processors typically measure average error rates or process infidelities. However, thresholds for fault-tolerant quantum error correction are given in terms of worst-case error rates -- defined via the diamond norm -- which can differ from average error rates by orders of magnitude. One method for resolving this discrepancy is to randomize the physical implementation of quantum gates, using techniques like randomized compiling (RC). In this work, we use gate set tomography to perform precision characterization of a set of two-qubit logic gates to study RC on a superconducting quantum processor. We find that, under RC, gate errors are accurately described by a stochastic Pauli noise model without coherent errors, and that spatially-correlated coherent errors and non-Markovian errors are strongly suppressed. We further show that the average and worst-case error rates are equal for randomly compiled gates, and measure a maximum worst-case error of 0.0197(3) for our gate set. Our results show that randomized benchmarks are a viable route to both verifying that a quantum processor's error rates are below a fault-tolerance threshold, and to bounding the failure rates of near-term algorithms, if -- and only if -- gates are implemented via randomization methods which tailor noise.

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arXiv2023

A simple asymptotically optimal Clifford circuit compilation algorithm

We present an algorithm that decomposes any $n$-qubit Clifford operator into a circuit consisting of three subcircuits containing only CNOT or CPHASE gates with layers of one-qubit gates before and after each of these subcircuits. As with other asymptotically optimal Clifford compilation algorithms, the resulting circuit contains $O(n^2/\log n)$ two-qubit gates. The derivation of our algorithm only requires the symplectic representation of Clifford gates, basic row and column matrix manipulations, and some known properties of general matrices over 0 and 1.

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arXiv2023

Demonstrating scalable randomized benchmarking of universal gate sets

Randomized benchmarking (RB) protocols are the most widely used methods for assessing the performance of quantum gates. However, the existing RB methods either do not scale to many qubits or cannot benchmark a universal gate set. Here, we introduce and demonstrate a technique for scalable RB of many universal and continuously parameterized gate sets, using a class of circuits called randomized mirror circuits. Our technique can be applied to a gate set containing an entangling Clifford gate and the set of arbitrary single-qubit gates, as well as gate sets containing controlled rotations about the Pauli axes. We use our technique to benchmark universal gate sets on four qubits of the Advanced Quantum Testbed, including a gate set containing a controlled-S gate and its inverse, and we investigate how the observed error rate is impacted by the inclusion of non-Clifford gates. Finally, we demonstrate that our technique scales to many qubits with experiments on a 27-qubit IBM Q processor. We use our technique to quantify the impact of crosstalk on this 27-qubit device, and we find that it contributes approximately 2/3 of the total error per gate in random many-qubit circuit layers.

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arXiv2023

Predictive Models from Quantum Computer Benchmarks

Holistic benchmarks for quantum computers are essential for testing and summarizing the performance of quantum hardware. However, holistic benchmarks -- such as algorithmic or randomized benchmarks -- typically do not predict a processor's performance on circuits outside the benchmark's necessarily very limited set of test circuits. In this paper, we introduce a general framework for building predictive models from benchmarking data using capability models. Capability models can be fit to many kinds of benchmarking data and used for a variety of predictive tasks. We demonstrate this flexibility with two case studies. In the first case study, we predict circuit (i) process fidelities and (ii) success probabilities by fitting error rates models to two kinds of volumetric benchmarking data. Error rates models are simple, yet versatile capability models which assign effective error rates to individual gates, or more general circuit components. In the second case study, we construct a capability model for predicting circuit success probabilities by applying transfer learning to ResNet50, a neural network trained for image classification. Our case studies use data from cloud-accessible quantum computers and simulations of noisy quantum computers.

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arXiv2023

Quantum circuit debugging and sensitivity analysis via local inversions

As the width and depth of quantum circuits implemented by state-of-the-art quantum processors rapidly increase, circuit analysis and assessment via classical simulation are becoming unfeasible. It is crucial, therefore, to develop new methods to identify significant error sources in large and complex quantum circuits. In this work, we present a technique that pinpoints the sections of a quantum circuit that affect the circuit output the most and thus helps to identify the most significant sources of error. The technique requires no classical verification of the circuit output and is thus a scalable tool for debugging large quantum programs in the form of circuits. We demonstrate the practicality and efficacy of the proposed technique by applying it to example algorithmic circuits implemented on IBM quantum machines.

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arXiv2023

Application-Oriented Performance Benchmarks for Quantum Computing

In this work we introduce an open source suite of quantum application-oriented performance benchmarks that is designed to measure the effectiveness of quantum computing hardware at executing quantum applications. These benchmarks probe a quantum computer's performance on various algorithms and small applications as the problem size is varied, by mapping out the fidelity of the results as a function of circuit width and depth using the framework of volumetric benchmarking. In addition to estimating the fidelity of results generated by quantum execution, the suite is designed to benchmark certain aspects of the execution pipeline in order to provide end-users with a practical measure of both the quality of and the time to solution. Our methodology is constructed to anticipate advances in quantum computing hardware that are likely to emerge in the next five years. This benchmarking suite is designed to be readily accessible to a broad audience of users and provides benchmarks that correspond to many well-known quantum computing algorithms.

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arXiv2022

Scalable randomized benchmarking of quantum computers using mirror circuits

The performance of quantum gates is often assessed using some form of randomized benchmarking. However, the existing methods become infeasible for more than approximately five qubits. Here we show how to use a simple and customizable class of circuits -- randomized mirror circuits -- to perform scalable, robust, and flexible randomized benchmarking of Clifford gates. We show that this technique approximately estimates the infidelity of an average many-qubit logic layer, and we use simulations of up to 225 qubits with physically realistic error rates in the range 0.1-1% to demonstrate its scalability. We then use up to 16 physical qubits of a cloud quantum computing platform to demonstrate that our technique can reveal and quantify crosstalk errors in many-qubit circuits.

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arXiv2022

Measuring the Capabilities of Quantum Computers

A quantum computer has now solved a specialized problem believed to be intractable for supercomputers, suggesting that quantum processors may soon outperform supercomputers on scientifically important problems. But flaws in each quantum processor limit its capability by causing errors in quantum programs, and it is currently difficult to predict what programs a particular processor can successfully run. We introduce techniques that can efficiently test the capabilities of any programmable quantum computer, and we apply them to twelve processors. Our experiments show that current hardware suffers complex errors that cause structured programs to fail up to an order of magnitude earlier - as measured by program size - than disordered ones. As a result, standard error metrics inferred from random disordered program behavior do not accurately predict performance of useful programs. Our methods provide efficient, reliable, and scalable benchmarks that can be targeted to predict quantum computer performance on real-world problems.

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arXiv2021

Quantum Circuit Transformations with a Multi-Level Intermediate Representation Compiler

Quantum computing promises remarkable approaches for processing information, but new tools are needed to compile program representations into the physical instructions required by a quantum computer. Here we present a novel adaptation of the multi-level intermediate representation (MLIR) integrated into a quantum compiler that may be used for checking program execution. We first present how MLIR enables quantum circuit transformations for efficient execution on quantum computing devices and then give an example of compiler transformations based on so-called mirror circuits. We demonstrate that mirror circuits inserted during compilation may test hardware performance by assessing quantum circuit accuracy on several superconducting and ion trap hardware platforms. Our results validate MLIR as an efficient and effective method for collecting hardware-dependent diagnostics through automated transformations of quantum circuits.

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arXiv2021

Experimental Characterization of Crosstalk Errors with Simultaneous Gate Set Tomography

Crosstalk is a leading source of failure in multiqubit quantum information processors. It can arise from a wide range of disparate physical phenomena, and can introduce subtle correlations in the errors experienced by a device. Several hardware characterization protocols are able to detect the presence of crosstalk, but few provide sufficient information to distinguish various crosstalk errors from one another. In this article we describe how gate set tomography, a protocol for detailed characterization of quantum operations, can be used to identify and characterize crosstalk errors in quantum information processors. We demonstrate our methods on a two-qubit trapped-ion processor and a two-qubit subsystem of a superconducting transmon processor.

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arXiv2021

Characterizing mid-circuit measurements on a superconducting qubit using gate set tomography

Measurements that occur within the internal layers of a quantum circuit -- mid-circuit measurements -- are an important quantum computing primitive, most notably for quantum error correction. Mid-circuit measurements have both classical and quantum outputs, so they can be subject to error modes that do not exist for measurements that terminate quantum circuits. Here we show how to characterize mid-circuit measurements, modelled by quantum instruments, using a technique that we call quantum instrument linear gate set tomography (QILGST). We then apply this technique to characterize a dispersive measurement on a superconducting transmon qubit within a multiqubit system. By varying the delay time between the measurement pulse and subsequent gates, we explore the impact of residual cavity photon population on measurement error. QILGST can resolve different error modes and quantify the total error from a measurement; in our experiment, for delay times above 1000 ns we measured a total error rate (i.e., half diamond distance) of $ε_{\diamond} = 8.1 \pm 1.4 \%$, a readout fidelity of $97.0 \pm 0.3\%$, and output quantum state fidelities of $96.7 \pm 0.6\%$ and $93.7 \pm 0.7\%$ when measuring $0$ and $1$, respectively.

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arXiv2021

Efficient flexible characterization of quantum processors with nested error models

We present a simple and powerful technique for finding a good error model for a quantum processor. The technique iteratively tests a nested sequence of models against data obtained from the processor, and keeps track of the best-fit model and its wildcard error (a quantification of the unmodeled error) at each step. Each best-fit model, along with a quantification of its unmodeled error, constitute a characterization of the processor. We explain how quantum processor models can be compared with experimental data and to each other. We demonstrate the technique by using it to characterize a simulated noisy 2-qubit processor.

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arXiv2021

A taxonomy of small Markovian errors

Errors in quantum logic gates are usually modeled by quantum process matrices (CPTP maps). But process matrices can be opaque, and unwieldy. We show how to transform a gate's process matrix into an error generator that represents the same information more usefully. We construct a basis of simple and physically intuitive elementary error generators, classify them, and show how to represent any gate's error generator as a mixture of elementary error generators with various rates. Finally, we show how to build a large variety of reduced models for gate errors by combining elementary error generators and/or entire subsectors of generator space. We conclude with a few examples of reduced models, including one with just $9N^2$ parameters that describes almost all commonly predicted errors on an N-qubit processor.

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