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Travis Hurant

Publications and source records attributed to Travis Hurant.

3 recordsLinked to original sources

Characterizing Large Scale Quantum Systems with Error Per Circuit Layer

Quantum benchmarks provide compact measures of performance that are important for evaluating and comparing quantum systems. Circuit-level benchmarks are particularly valuable because they capture the accumulated effects of noise across interacting operations, but existing approaches may require structured gate sets and costly compilation, classical simulation of reference outputs, or subsystem decompositions that do not capture full-register behavior. We introduce Error Per Circuit Layer (EPCL), an overlap-based circuit-level benchmark that estimates an effective layer polarization by applying identical random circuits to two disjoint quantum registers and measuring the overlap between their output states as a function of circuit depth. EPCL avoids classical simulation of ideal output distributions and recovery to a known reference state, and is compatible with arbitrary gate sets, including non-Clifford gates. We derive the expected overlap decay under an ensemble-averaged depolarizing model and identify the assumptions under which the fitted decay parameter represents an effective layer polarization. Numerical simulations show that EPCL recovers the predicted polarization under weak local stochastic noise and remains well described by a single-exponential decay at stronger stochastic noise levels. The simulations further show that coherent errors associated with fixed entangling layers may require Pauli twirling or randomized compiling to produce the expected decay, while inter-register correlations contribute an additional covariance term to the measured overlap. Finally, experiments on IBM quantum hardware demonstrate clear EPCL decay in 8- and 16-qubit implementations. These results support EPCL as a method for measuring aggregate register performance without requiring classical simulation of ideal circuit outputs or restriction to structured gate sets.

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Few-Shot, Robust Calibration of Single Qubit Gates Using Bayesian Robust Phase Estimation

Accurate calibration of control parameters in quantum gates is crucial for high-fidelity operations, yet it represents a significant time and resource challenge, necessitating periods of downtime for quantum computers. Robust Phase Estimation (RPE) has emerged as a practical and effective calibration technique aimed at tackling this challenge. It combines a provably efficient number of control pulses with a classical post-processing algorithm to estimate the phase accumulated by a quantum gate. We introduce Bayesian Robust Phase Estimation (BRPE), an innovative approach that integrates Bayesian parameter estimation into the classical post-processing phase to reduce the sampling overhead. Our numerical analysis shows that BRPE markedly reduces phase estimation errors, requiring approximately $50\%$ fewer samples than standard RPE. Specifically, in an ideal, noise-free setting, it achieves up to a $96\%$ reduction in average absolute estimation error for a fixed sample cost of $88$ shots when compared to RPE. Under a depolarizing noise model, it attains up to a $47\%$ reduction for a fixed cost of $176$ shots. Additionally, we adapt BRPE for Ramsey spectroscopy applications and successfully implement it experimentally in a trapped ion system.

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Asymmetry of CNOT gate operation in superconducting transmon quantum processors using cross-resonance entangling

Controlled-NOT (CNOT) gates are commonly included in the standard gate set of quantum processors and provide an important way to entangle qubits. For fixed-frequency qubits using the cross-resonance entangling technique, using the higher-frequency qubit to control the lower-frequency qubit enables much shorter entangling times than using the lower-frequency qubit as the control. Consequently, when implementing a CNOT gate where logical control by the lower-frequency qubit is needed, compilers may implement this functionality by using an equivalent circuit such as placing Hadamard gates on both qubits before and after a CNOT gate controlled by the higher-frequency qubit. However, since the implementation is different depending on which qubit is the control, a natural question arises regarding the relative performance of the implementations. We have explored this using quantum processors on the IBM Q network. The basic circuit used consisted of operations to create a Bell State, followed by the inverse operations so as to return the qubits to their initial state in the absence of errors (Hadamard + CNOT + barrier + CNOT + Hadamard). The circuit depth was varied using multiples of this basic circuit. An asymmetry in the error of the final state was observed that increased with the circuit depth. The strength and direction of the asymmetry was unique but repeatable for each pair of coupled qubits tested. This observation suggests that the asymmetry in CNOT implementation should be characterized for the qubits of interest and incorporated into circuit transpilation to obtain the best accuracy for a particular computation.

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