arXiv subjects

Ulrich Schmid

Publications and source records attributed to Ulrich Schmid.

At least 19 recordsLinked to original sources

arXiv2026

Oxidation-resilient structural modifications in Nickel-functionalized 3D-graphene for hydrogen storage applications

Porous materials represent a versatile solution for several applications. Indeed, the recent development of a new material, named 3D-Graphene, which combines the exceptional characteristics of graphene with a three-dimensional structure, opens perspectives for applications where a high surface-to-volume ratio is beneficial. In this study, we explore the functionalization of 3D-Graphene with nickel (Ni)-nanoparticles as a strategy to enhance hydrogen storage capabilities, and we assess the influence of the NPs on hydrogen uptake and oxidation resilience. The morphology and structural properties of pristine and Ni-functionalized samples were characterized using Scanning Electron Microscopy. Additionally, X-ray Photoelectron Spectroscopy was employed to analyze the surface chemical composition of the functionalized samples. Samples have been hydrogenated supplying molecular or atomic hydrogen, and hydrogen storage performance was assessed through Thermal Desorption Spectroscopy. Afterwards, oxidation effects were systematically studied by exposing the samples to atmospheric oxygen, followed by further hydrogenation experiments. Our results indicate that Ni functionalization influences both hydrogen adsorption and oxidation behavior, with potential implications for improving the stability of the material, especially for hydrogen storage applications.

cond-mat.mtrl-sci↗

arXiv2026

A Symbolic Execution Framework for Symbolic Timing Analysis of Digital Integrated Circuits

Simulation-based dynamic timing analysis of digital integrated circuits (DDTA) offers a faster alternative to traditional analog SPICE simulations. To achieve timing predictions that are reasonably competitive in terms of accuracy, however, DDTA mandates gate delay models that go beyond the standard pure or inertial delay models used in state-of-the-art tools. Recent advances in analytic gate delay models, which now also capture effects like drafting and multi-input switching, unlock new possibilities for timing analysis, which go way beyond simulation-based approaches towards an exhaustive exploration. In this paper, we present the cornerstones of a novel symbolic execution framework, which utilizes such analytic delay models for automatically computing symbolic delay expressions for all paths in a digital circuit, for some given ordering of the input transitions. To reduce combinatorial explosion, we introduce symbolic pruning methods that also enable path-sensitive, goal-driven reasoning about timing properties and analytic optimization of specific circuit paths.

cs.AR↗

arXiv2025

Drafting and Multi-Input Switching in Digital Dynamic Timing Simulation for Multi-Input Gates

We present a prototype multi-input gate extension of the publicly available Involution Tool for accurate digital timing simulation and power analysis of integrated circuits introduced by Oehlinger et al. (Integration, 2021). Relying on discrete event simulation, the Involution Tool allows fast timing simulation of circuits made up of an arbitrary composition of supported gates, provides automatic random input stimulus generation, and supports parameter sweeping. It also enables a detailed comparison of the delay predictions obtained by different models, including pure and inertial delays as well as digitized SPICE-generated reference traces. Our extension added support for 2-input gates like NOR and NAND, by implementing novel analytic delay formulas obtained via a refined analysis of a recently proposed thresholded first-order hybrid model of such gates. The resulting formulas faithfully cover not only multi-input switching effects (also known as Charlie effects), but also the decay of short pulses (aka Drafting effects). Besides the fact that our analytic models not only allow the derivation of closed-form delay formulas for arbitrary compositions of such gates, they are also key for a strikingly simple procedure for model parametrization, i.e., for gate characterization, which only needs three characteristic delay values. Using the extended Involution Tool, we compare the delay and power predictions for some benchmarking circuits stimulated by randomly generated input traces. Overall, our results reveal considerably improved prediction accuracy compared to the original Involution Tool, without a noticeable performance penalty.

cs.OH↗

arXiv2025

Symbolic Timing Analysis of Digital Circuits Using Analytic Delay Functions

We propose a novel approach to symbolic timing analysis for digital integrated circuits based on recently developed analytic delay formulas for 2-input NOR, NAND, and Muller-C gates by Ferdowsi et al. (NAHS 2025). Given a fixed order of the transitions of all input and internal signals of a circuit, our framework computes closed-form analytic delay expressions for all the internal signal transition times that depend on (i) the symbolic transition times of the relevant input signals and (ii) the model parameters of the relevant gates. The resulting formulas facilitate per-transition timing analysis without any simulation, by instantiating the symbolic input transition times and the gate parameters. More importantly, however, they also enable an \emph{analytic} study of the dependencies of certain timing properties on input signals and gate parameters. For instance, differentiating a symbolic delay expression with respect to a gate parameter or input transition time enables sensitivity analysis. As a proof of concept, we implement our approach using the computer algebra system SageMath and apply it to the NOR-gate version of the c17 slack benchmark circuit.

cs.AR↗

arXiv2025

Lower Bounds for $k$-Set Agreement in Fault-Prone Networks

We develop a new lower bound for k-set agreement in synchronous message-passing systems connected by an arbitrary directed communication network, where up to t processes may crash. Our result thus generalizes the t/k+1 lower bound for complete networks in the t-resilient model by Chaudhuri, Herlihy, Lynch, and Tuttle [JACM'00]. Moreover, it generalizes two lower bounds for oblivious algorithms in synchronous systems connected by an arbitrary undirected communication network known to the processes, namely, the domination number-based lower bound by Castaneda, Fraigniaud, Paz, Rajsbaum, Roy, and Travers [TCS'21] for failure-free processes, and the radius-based lower bound in the t-resilient model by Fraigniaud, Nguyen, and Paz [STACS'24]. Our topological proof non-trivially generalizes and extends the connectivity-based approach for the complete network, as presented in the book by Herlihy, Kozlov, and Rajsbaum (2013). It is based on a sequence of shellable carrier maps that, starting from a shellable input complex, determine the evolution of the protocol complex: During the first t/k rounds, carrier maps that crash exactly k processes per round are used, ensuring high connectivity of their images. A Sperner's lemma style argument is used to prove that k-set agreement is still impossible by that round. From round t/k+1 up to our lower bound, we employ a novel carrier map that maintains high connectivity. Our proof also provides a strikingly simple lower bound for k-set agreement in synchronous systems with an arbitrary communication network with initial crashes. We express the resulting additional agreement overhead via an appropriately defined radius of the communication graphs. Finally, we prove that the usual input pseudosphere complex for k-set agreement can be replaced by an exponentially smaller input complex based on Kuhn triangulations, which we prove to be also shellable.

cs.DC↗

arXiv2024

Signal Prediction for Digital Circuits by Sigmoidal Approximations using Neural Networks

Investigating the temporal behavior of digital circuits is a crucial step in system design, usually done via analog or digital simulation. Analog simulators like SPICE iteratively solve the differential equations characterizing the circuits components numerically. Although unrivaled in accuracy, this is only feasible for small designs, due to the high computational effort even for short signal traces. Digital simulators use digital abstractions for predicting the timing behavior of a circuit. Besides static timing analysis, which performs corner-case analysis of critical path delays only, dynamic timing analysis provides per-transition timing information in signal traces. In this paper, we advocate a novel approach, which generalizes digital traces to traces consisting of sigmoids, each parameterized by threshold crossing time and slope. What is needed to compute the output trace of a gate is a transfer function, which determines the parameters of the output sigmoids given the parameters of the input sigmoids. Harnessing the power of artificial neural networks (ANN), we implement such transfer functions via ANNs. Using inverters and NOR as the elementary gates in a prototype implementation of a specifically tailored simulator, we demonstrate that our approach operates substantially faster than an analog simulator, while offering better accuracy than a digital simulator.

cs.AR↗

arXiv2024

Topological Characterization of Stabilizing Consensus

We provide a complete characterization of the solvability/impossibility of deterministic stabilizing consensus in any computing model with benign process and communication faults using point-set topology. Relying on the topologies for infinite executions introduced by Nowak, Schmid and Winkler (JACM, 2024) for terminating consensus, we prove that semi-open decision sets and semi-continuous decision functions as introduced by Levin (AMM, 1963) are the appropriate means for this characterization: Unlike the decision functions for terminating consensus, which are continuous, semi-continuous functions do not require the inverse image of an open set to be open and hence allow to map a connected space to a disconnected one. We also show that multi-valued stabilizing consensus with weak and strong validity are equivalent, as is the case for terminating consensus. By applying our results to (variants of) all the known possibilities/impossibilities for stabilizing consensus, we easily provide a topological explanation of these results.

cs.DC↗

arXiv2024

Microelectronic readout of a diamond quantum sensor

Quantum sensors based on the nitrogen-vacancy (NV) centre in diamond are rapidly advancing from scientific exploration towards the first generation of commercial applications. While significant progress has been made in developing suitable methods for the manipulation of the NV centre spin state, the detection of the defect luminescence has so far limited the performance of miniaturized sensor architectures. The recent development of photoelectric detection of the NV centre's spin state offers a path to circumvent these limitations, but has to-date required research-grade low current amplifiers to detect the picoampere-scale currents obtained from these systems. Here we report on the photoelectric detection of magnetic resonance (PDMR) with NV ensembles using a complementary metal-oxide semiconductor (CMOS) device. The integrated circuit delivers a digitized output of the diamond sensor with low noise and 50 femtoampere resolution. This integration provides the last missing component on the path to a compact, diamond-based quantum sensor. The device is suited for continuous wave (CW) as well as pulsed operation. We demonstrate its functionality with DC and AC magnetometry up to several megahertz, coherent spin rotation and multi-axial decoupling sequences for quantum sensing.

quant-ph↗

arXiv2024

Faithful Dynamic Timing Analysis of Digital Circuits Using Continuous Thresholded Mode-Switched ODEs

Thresholded hybrid systems are restricted dynamical systems, where the current mode, and hence the ODE system describing its behavior, is solely determined by externally supplied digital input signals and where the only output signals are digital ones generated by comparing an internal state variable to a threshold value. An attractive feature of such systems is easy composition, which is facilitated by their purely digital interface. A particularly promising application domain of thresholded hybrid systems is digital integrated circuits: Modern digital circuit design considers them as a composition of Millions and even Billions of elementary logic gates, like inverters, GOR and Gand. Since every such logic gate is eventually implemented as an electronic circuit, however, which exhibits a behavior that is governed by some ODE system, thresholded hybrid systems are ideally suited for making the transition from the analog to the digital world rigorous. In this paper, we prove that the mapping from digital input signals to digital output signals is continuous for a large class of thresholded hybrid systems. Moreover, we show that, under some mild conditions regarding causality, this continuity also continues to hold for arbitrary compositions, which in turn guarantees that the composition faithfully captures the analog reality. By applying our generic results to some recently developed thresholded hybrid gate models, both for single-input single-output gates like inverters and for a two-input CMOS NOR gate, we show that they are continuous. Moreover, we provide a novel thresholded hybrid model for the two-input NOR gate, which is not only continuous but also, unlike the existing one, faithfully models all multi-input switching effects.

eess.SY↗

arXiv2024

A Hybrid Delay Model for Interconnected Multi-Input Gates

Dynamic digital timing analysis is a less accurate but fast alternative to highly accurate but slow analog simulations of digital circuits. It relies on gate delay models, which allow the determination of input-to-output delays of a gate on a per-transition basis. Accurate delay models not only consider the effect of preceding output transitions here but also delay variations induced by multi-input switching (MIS) effects in the case of multi-input gates. Starting out from a first-order hybrid delay model for CMOS two-input NOR gates, we develop a hybrid delay model for Muller C gates and show how to augment these models and their analytic delay formulas by a first-order interconnect. Moreover, we conduct a systematic evaluation of the resulting modeling accuracy: Using SPICE simulations, we quantify the MIS effects on the gate delays under various wire lengths, load capacitances, and input strengths for two different CMOS technologies, comparing these results to the predictions of appropriately parameterized versions of our new gate delay models. Overall, our experimental results reveal that they capture all MIS effects with a surprisingly good accuracy despite being first-order only.

cs.AR↗

arXiv2024

A Logic for Repair and State Recovery in Byzantine Fault-tolerant Multi-agent Systems

We provide an epistemic logical language and semantics for the modeling and analysis of byzantine fault-tolerant multi-agent systems. This not only facilitates reasoning about the agents' fault status but also supports model updates for implementing repair and state recovery. For each agent, besides the standard knowledge modality our logic provides an additional modality called hope, which is capable of expressing that the agent is correct (not faulty), and also dynamic modalities enabling change of the agents' correctness status. These dynamic modalities are interpreted as model updates that come in three flavours: fully public, more private, or involving factual change. We provide complete axiomatizations for all these variants in the form of reduction systems: formulas with dynamic modalities are equivalent to formulas without. Therefore, they have the same expressivity as the logic of knowledge and hope. Multiple examples are provided to demonstrate the utility and flexibility of our logic for modeling a wide range of repair and state recovery techniques that have been implemented in the context of fault-detection, isolation, and recovery (FDIR) approaches in fault-tolerant distributed computing with byzantine agents.

cs.DC↗

arXiv2023

Metal Nanoparticle-Functionalized Three-Dimensional Graphene: a versatile platform towards sensors and energy-related applications

We demonstrate the first successful functionalization of epitaxial three-dimensional graphene with metal nanoparticles. The functionalization is obtained by immersing the 3D graphene in a nanoparticle colloidal solution. This method is versatile and here is demonstrated for gold and palladium, but can be extended to other types and shapes of nanoparticles. We have measured the nanoparticle density on the top-surface and in the porous layer volume by Scanning Electron Microscopy and Scanning Transmission Electron Microscopy. Samples exhibit a high coverage of nanoparticles with minimal clustering. High quality graphene has been demonstrated to promote the functionalization leading to higher nanoparticle density, both on the surface and in the pores. X-ray Photoelectron Spectroscopy allowed to verify the absence of contamination after the functionalization process. Moreover, it confirmed the thermal stability of the Au- and Pd-functionalized three-dimensional graphene up to 530{\deg}C. Our approach opens up new avenues for utilizing three-dimensional graphene as a versatile platform for catalytic applications, sensors, and energy storage and conversion.

physics.app-ph↗

arXiv2023

Network Abstractions for Characterizing Communication Requirements in Asynchronous Distributed Systems

Whereas distributed computing research has been very successful in exploring the solvability/impossibility border of distributed computing problems like consensus in representative classes of computing models with respect to model parameters like failure bounds, this is not the case for characterizing necessary and sufficient communication requirements. In this paper, we introduce network abstractions as a novel approach for modeling communication requirements in asynchronous distributed systems. A network abstraction of a run is a sequence of directed graphs on the set of processes, where the $i$-th graph specifies some ``potential'' message chains that can be guaranteed to arise in the $i$-th portion of the run. Formally, they are defined via associating message sending times with the end-to-end delays that would arise if the message was indeed sent by the sender's protocol. Network abstractions also allow to reason about future causal cones that might arise in a run, hence also facilitate reasoning about liveness properties, and are inherently compatible with temporal epistemic reasoning frameworks. We demonstrate the utility of our approach by providing necessary and sufficient network abstractions for solving the canonical firing rebels with relay (FRR) problem, and variants thereof, in asynchronous message-passing systems with up to $f$ byzantine processes connected via point-to-point links. FRR is not only a basic primitive in clock synchronization and consensus algorithms, but also integrates several distributed computing problems, namely triggering events, agreement and even stabilizing agreement, in a single problem instance.

cs.DC↗

arXiv2023

Three-dimensional graphene on a nano-porous 4H-SiC backbone: a novel material for food sensing applications

Sensors which are sensitive to volatile organic compounds and thus able to monitor the conservation state of food, are precious because they work non-destructively and allow to avoid direct contact with the food, ensuring hygienic conditions. In particular, the monitoring of rancidity would solve a widespread issue in food storage. The sensor discussed here is produced utilizing a novel three-dimensional arrangement of graphene, which is grown on a crystalline silicon carbide (SiC) wafer previously porousified by chemical etching. This approach allows a very high surface-to.volume ratio. Furthermore, the structure of the sensor surface features a large amount of edges, dangling bounds, and active sites, which make the sensor, on a chemically robust skeleton, chemically active, particularly to hydrogenated molecules. The interaction of the sensor with such compounds is read out by measuring the sensor resistance in a four wire configuration. The sensor performance has been assessed on three hazelnut samples: sound hazelnuts, spoiled hazelnuts, and stink bug hazelnuts. A resistance variation of about DeltaR = 0.13 (0.02) Ohm between sound and damaged hazelnuts has been detected. Our measurements confirm the ability of the sensor to discriminate between sound and damaged hazelnuts. The sensor signal is stable for days, providing the possibility to use this sensor for the monitoring of the storage state of fats and foods in general.

physics.app-ph↗

arXiv2023

A Sufficient Condition for Gaining Belief in Byzantine Fault-Tolerant Distributed Systems

Existing protocols for byzantine fault tolerant distributed systems usually rely on the correct agents' ability to detect faulty agents and/or to detect the occurrence of some event or action on some correct agent. In this paper, we provide sufficient conditions that allow an agent to infer the appropriate beliefs from its history, and a procedure that allows these conditions to be checked in finite time. Our results thus provide essential stepping stones for developing efficient protocols and proving them correct.

cs.DC↗

arXiv2023

An Accurate Hybrid Delay Model for Multi-Input Gates

In order to facilitate the analysis of timing relations between individual transitions in a signal trace, dynamic digital timing analysis offers a less accurate but much faster alternative to analog simulations of digital circuits. This primarily requires gate delay models that also account for the fact that the input-to-output delay of a particular input transition also depends on the temporal distance to the previous output transitions. In the case of multi-input gates, the delay also experiences variations caused by multi-input switching (MIS) effects, i.e., transitions at different inputs that occur in close temporal proximity. In this paper, we advocate the development of hybrid delay models for CMOS gates obtained by replacing transistors with time-variant resistors. We exemplify our approach by applying it to a NOR gate (and, hence, to the dual NAND gate) and a Muller C gate. We analytically solve the resulting first-order differential equations with non-constant-coefficients, and derive analytic expressions for the resulting MIS gate delays. The resulting formulas not only pave the way to a sound model parametrization procedure, but are also instrumental for implementing fast and efficient digital timing simulation. By comparison with analog simulation data, we show that our models faithfully represent all relevant MIS effects. Using an implementation in the Involution Tool, we demonstrate that our model surpasses the alternative digital delay models for NOR gates known to us in terms of accuracy, with comparably short running times.

cs.OH↗

arXiv2023

Advanced Mid-Infrared Plasmonic Waveguides For On-Chip Integrated Photonics

Long-wave infrared (LWIR, 8-14 um) photonics is a rapidly growing research field within the mid-IR with applications in molecular spectroscopy and optical free-space communication. LWIR-applications are often addressed using rather bulky tabletop-sized free-space optical systems, preventing advanced photonic applications such as rapid-time-scale experiments. Here, device miniaturization into photonic integrated circuits (PICs) with maintained optical capabilities is key to revolutionize mid-IR photonics. Sub-wavelength mode confinement in plasmonic structures enabled such miniaturization approaches in the visible-to-near-IR spectral range. However, adopting plasmonics for the LWIR needs suitable low-loss and -dispersion materials with compatible integration strategies to existing mid-IR technology. In this work we further unlock the field of LWIR/mid-IR PICs, by combining photolithographic patterning of organic polymers with dielectric-loaded surface plasmon polariton (DLSPP) waveguides. In particular, polyethylene shows favorable optical properties, including low refractive index and broad transparency between ~2-200 um. We investigate the whole value chain, including design, fabrication, and characterization of polyethylene-based DLSPP waveguides and demonstrate their first-time plasmonic operation and mode guiding capabilities along s-bend structures. Low bending losses of ~1.3 dB and straight-section propagation lengths of ~1 mm, pave the way for unprecedented, complex on-chip mid-IR photonic devices. Moreover, DLSPPs allow full control of the mode parameters (propagation length and guiding capabilities) for precisely addressing advanced sensing and telecommunication applications with chip-scale devices.

physics.optics↗

arXiv2023

A Digital Delay Model Supporting Large Adversarial Delay Variations

Dynamic digital timing analysis is a promising alternative to analog simulations for verifying particularly timing-critical parts of a circuit. A necessary prerequisite is a digital delay model, which allows to accurately predict the input-to-output delay of a given transition in the input signal(s) of a gate. Since all existing digital delay models for dynamic digital timing analysis are deterministic, however, they cannot cover delay fluctuations caused by PVT variations, aging and analog signal noise. The only exception known to us is the $η$-IDM introduced by Függer et al. at DATE'18, which allows to add (very) small adversarially chosen delay variations to the deterministic involution delay model, without endangering its faithfulness. In this paper, we show that it is possible to extend the range of allowed delay variations so significantly that realistic PVT variations and aging are covered by the resulting extended $η$-IDM.

cs.OH↗