arXiv subjects

Vadym Kliuchnikov

Publications and source records attributed to Vadym Kliuchnikov.

At least 19 recordsLinked to original sources

arXiv2026

Composing Detector Error Models

Fault-tolerant quantum programs thread together reusable logical operations, yet correcting errors requires comparing measurements across operation boundaries. Correlations tie each operation's error analysis to the computation around it. Adaptive computation makes this a runtime challenge: measurement results determine which operation comes next, so the error analysis must keep pace with execution. We introduce extended detector error models (EDEMs), which compose in sequence and in parallel, mirroring the composition of physical realizations and their detector contracts. We prove how detectors, the measurement parities used to diagnose errors, can be split across circuit boundaries, and establish conditions under which composition recovers the assembled circuit's detector error model. This structure supports symbolic precompilation and analysis of entire families of circuits. It also defines error models for decoding windows and the boundary information through which committed corrections affect subsequent windows. The same interface thus connects the design of individual logical operations to the decoding of an unfolding quantum program.

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arXiv2026

CUDA-Q Logical: Retargetable Compilation for Fault-Tolerant Quantum Computing

Realizing fault-tolerant quantum computing requires mapping logical programs to heterogeneous quantum error correction (QEC) codes and diverse fault-tolerant execution models, scheduling physical resources, and coupling to real-time classical control and feedback. Specialized tools exist for each step but rely on manual composition and translation that discard assumptions and provenance, separating resource estimates from the compiler artifacts they describe, and making it difficult to validate correctness, compare architectures, or attribute costs to specific design choices. We present CUDA-Q Logical, an extensible compiler infrastructure for retargetable fault-tolerant compilation, analysis, and execution. Interoperable with CUDA-Q and other mainstream front-ends, CUDA-Q Logical progressively lowers target-independent logical programs through a constrained logical virtual machine, QEC microcode, physical gate schedules, and real-time control plans, with each layer preserving semantics and provenance, while verifying composition and resource constraints. By deriving every resource estimate directly from compiler artifacts, the framework unifies compilation and resource analysis, enabling successively refined estimates and principled cross-architecture comparison while permitting QEC codes, execution models, decoders, and hardware architectures to be introduced as modular extensions. Across workloads ranging from application-architecture studies to qLDPC surgery and detector-error-model composition, we show that schedule-derived estimates reconcile with established independent models. Crucially, this compiler-visible structure exposes cost drivers hidden by aggregate analytical formulas, carries QEC artifacts intact into simulation, and demonstrates a complete compilation pipeline for fault-tolerant quantum computing.

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arXiv2026

Direct U(2) approximation via repeat-until-success circuits

We show how to directly and efficiently approximate arbitrary one-qubit unitaries, bypassing the Euler decomposition and the magnitude approximation problem, at the cost of one ancillary qubit. Our technique also applies to approximating unitaries with multi-qubit gate sets such as Clifford and CS, or Clifford and CCZ, as well as to approximating orthogonal matrices using multi-qubit gate sets such as Real Clifford and CCZ. The key tools are repeat-until-success circuits, lattice-based exact synthesis algorithms, integer point enumeration in convex sets, and relative norm equations.

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arXiv2026

Phased outcome-complete simulation

We generalize the polynomial-time outcome-complete simulation algorithm for stabilizer circuits in arXiv:2309.08676 to track global phases exactly, yielding what we call phased outcome-complete simulation. The original algorithm enabled equivalence checking of stabilizer circuits with intermediate measurements and conditional Pauli corrections for all input states and all measurement outcomes simultaneously, but it tracked quantum states only up to a global phase. Our generalization removes this limitation and enables equivalence checking for an important family of non-stabilizer circuits: stabilizer circuits augmented with single-qubit rotations $\exp(iαZ)$ by symbolic angles. Two such circuits are equivalent if they implement the same quantum channel for all values of the symbolic angles and all measurement outcomes, given a one-to-one correspondence between rotation angles in the two circuits and a mapping between measurement outcomes. This model enables testing of compilation algorithms that transform the Clifford portions of a computation while preserving rotation angles. Examples include Pauli-based computation, edge-disjoint path compilation for surface codes, and custom compilation strategies for reversible circuits such as adders, multipliers, and table lookups. Our efficient classical verification methods extend naturally to circuits with outcome-parity-conditional Pauli gates and intermediate measurements, features that are ubiquitous in fault-tolerant quantum computing but are rarely addressed by existing equivalence-checking approaches.

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arXiv2026

Clifford synthesis via generalized S and CZ gates

We show that any $n$-qubit Clifford unitary can be implemented using at most $2n$ multi-qubit joint measurements. All the multi-qubit joint measurements used for implementing the Clifford unitary can be chosen to form at most two sets of independent mutually-commuting measurements. Each of these sets is of size at most $n$. This enables very flexible space-time trade-offs when implementing Clifford unitaries. We also discuss a version of the result that relies on multi-target CNOTs and is more relevant for targeting fault-tolerant hardware based on Quantum LDPC codes.

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arXiv2025

Excising dead components in the surface code using minimally invasive alterations: A performance study

The physical implementation of a large-scale error-corrected quantum processor will necessarily need to mitigate the presence of defective (thereby "dead") physical components in its operation, for example, identified during bring-up of the device or detected in the middle of a computation. In the context of solid-state qubits, the quantum error correcting protocol operating in the presence of dead components should ideally (i) use the same native operation set as that without dead components, (ii) maximize salvaging of functional components, and (iii) use a consistent global operating schedule which optimizes logical qubit performance and is compatible with the control requirements of the system. The scheme proposed by Grans-Samuelsson et al. [Quantum 8, 1429 (2024)] satisfies all three of these criteria: it effectively excises (cuts out) dead components from the surface code using minimally invasive alterations (MIA). We conduct extensive numerical simulations of this proposal for the pairwise-measurement-based surface code protocol in the presence of dead components under circuit-level noise. To that end, we also describe techniques to automatically construct performant check (detector) bases directly from circuits without manual circuit annotation, which may be of independent interest. Both the MIA scheme and this automated check basis computation can be readily used with measurement-based as well as CNOT-based circuits, and the results presented here demonstrate state-of-the-art performance.

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arXiv2025

Roadmap to fault tolerant quantum computation using topological qubit arrays

We describe a concrete device roadmap towards a fault-tolerant quantum computing architecture based on noise-resilient, topologically protected Majorana-based qubits. Our roadmap encompasses four generations of devices: a single-qubit device that enables a measurement-based qubit benchmarking protocol; a two-qubit device that uses measurement-based braiding to perform single-qubit Clifford operations; an eight-qubit device that can be used to show an improvement of a two-qubit operation when performed on logical qubits rather than directly on physical qubits; and a topological qubit array supporting lattice surgery demonstrations on two logical qubits. Devices that enable this path require a superconductor-semiconductor heterostructure that supports a topological phase, quantum dots and coupling between those quantum dots that can create the appropriate loops for interferometric measurements, and a microwave readout system that can perform fast, low-error single-shot measurements. We describe the key design components of these qubit devices, along with the associated protocols for demonstrations of single-qubit benchmarking, Clifford gate execution, quantum error detection, and quantum error correction, which differ greatly from those in more conventional qubits. Finally, we comment on implications and advantages of this architecture for utility-scale quantum computation.

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arXiv2025

A Topologically Fault-Tolerant Quantum Computer with Four Dimensional Geometric Codes

Topological quantum codes are intrinsically fault-tolerant to local noise, and underlie the theory of topological phases of matter. We explore geometry to enhance the performance of topological quantum codes by rotating the four dimensional self-correcting quantum memory, and present codes targeted to both near-term and utility-scale quantum computers. We identify a full set of logical Clifford operations and with it design a universal fault-tolerant quantum architecture. Our design achieves single-shot error correction, significant reductions in required qubits, and low-depth logical operations. In turn, our proposed architecture relaxes the requirements for achieving fault tolerance and offers an efficient path for realization in several near-term quantum hardware implementations. Our [[96,6,8]] 4D Hadamard lattice code has low weight-6 stabilizers and depth-8 syndrome extraction circuits, a high pseudo-threshold of $\sim 0.01$, and a logical error rate of $\sim 10^{-6}$ per logical qubit per round of error correction at $10^{-3}$ physical error rate under a standard circuit-level noise model. A Clifford-complete logical gate set is presented, including a constructive and efficient method for Clifford gate synthesis.

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arXiv2024

Trading T gates for dirty qubits in state preparation and unitary synthesis

Efficient synthesis of arbitrary quantum states and unitaries from a universal fault-tolerant gate-set e.g. Clifford+T is a key subroutine in quantum computation. As large quantum algorithms feature many qubits that encode coherent quantum information but remain idle for parts of the computation, these should be used if it minimizes overall gate counts, especially that of the expensive T-gates. We present a quantum algorithm for preparing any dimension-$N$ pure quantum state specified by a list of $N$ classical numbers, that realizes a trade-off between space and T-gates. Our scheme uses $\mathcal{O}(\log{(N/ε)})$ clean qubits and a tunable number of $\sim(λ\log{(\frac{\log{N}}ε)})$ dirty qubits, to reduce the T-gate cost to $\mathcal{O}(\frac{N}λ+λ\log{\frac{N}ε}\log{\frac{\log{N}}ε})$. This trade-off is optimal up to logarithmic factors, proven through an unconditional gate counting lower bound, and is, in the best case, a quadratic improvement in T-count over prior ancillary-free approaches. We prove similar statements for unitary synthesis by reduction to state preparation. Underlying our constructions is a T-efficient circuit implementation of a quantum oracle for arbitrary classical data.

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arXiv2024

Stabilizer operators and Barnes-Wall lattices

We give a simple description of rectangular matrices that can be implemented by a post-selected stabilizer circuit. Given a matrix with entries in dyadic cyclotomic number fields $\mathbb{Q}(\exp(i\frac{2π}{2^m}))$, we show that it can be implemented by a post-selected stabilizer circuit if it has entries in $\mathbb{Z}[\exp(i\frac{2π}{2^m})]$ when expressed in a certain non-orthogonal basis. This basis is related to Barnes-Wall lattices. Our result is a generalization to a well-known connection between Clifford groups and Barnes-Wall lattices. We also show that minimal vectors of Barnes-Wall lattices are stabilizer states, which may be of independent interest. Finally, we provide a few examples of generalizations beyond standard Clifford groups.

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arXiv2024

Multi-qubit circuit synthesis and Hermitian lattices

We present new optimal and heuristic algorithms for exact synthesis of multi-qubit unitaries and isometries. For example, our algorithms find Clifford and T circuits for unitaries with entries in $\mathbb{Z}[i,1/\sqrt{2}]$. The optimal algorithms are the A* search instantiated with a new data structure for graph vertices and new consistent heuristic functions. We also prove that for some gate sets, best-first search synthesis relying on the same heuristic is efficient. For example, for two-qubit Clifford and T circuits, our best-first search runtime is proportional to the T-count of the unitary. Our algorithms rely on Hermite and Smith Normal Forms of matrices with entries in a ring of integers of a number field, and we leverage the theory of and algorithms for Hermitian lattices over number fields to prove efficiency. These new techniques are of independent interest for future work on multi-qubit exact circuit synthesis and related questions.

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arXiv2024

Minimal entanglement for injecting diagonal gates

Non-Clifford gates are frequently exclusively implemented on fault-tolerant architectures by first distilling magic states in specialised magic-state factories. In the rest of the architecture, the computational space, magic states can then be consumed by a stabilizer circuit to implement non-Clifford operations. We show that the connectivity between the computational space and magic state factories forms a fundamental bottleneck on the rate at which non-Clifford operations can be implemented. We show that the nullity of the magic state, $ν(|D\rangle)$ for diagonal gate $D$, characterizes the non-local resources required to implement $D$ in the computational space. As part of our proof, we construct local stabilizer circuits that use only $ν(|D\rangle)$ ebits to implement $D$ in the computational space that may be useful to reduce the non-local resources required to inject non-Clifford gates. Another consequence is that the edge-disjoint path compilation algorithm [arXiv:2110.11493] produces minimum-depth circuits for implementing single-qubit diagonal gates.

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arXiv2024

Fault tolerance of stabilizer channels

Stabilizer channels are stabilizer circuits that implement logical operations while mapping from an input stabilizer code to an output stabilizer code. They are widely used to implement fault tolerant error correction and logical operations in stabilizer codes such as surface codes and LDPC codes, and more broadly in subsystem, Floquet and space-time codes. We introduce a rigorous and general formalism to analyze the fault tolerance properties of any stabilizer channel under a broad class of noise models. This includes rigorous but easy-to-work-with definitions and algorithms for the fault distance and hook faults for stabilizer channels. The generalized notion of hook faults which we introduce, defined with respect to an arbitrary subset of a circuit's faults rather than a fixed phenomenological noise model, can be leveraged for fault-tolerant circuit design. Additionally, we establish necessary conditions such that channel composition preserves the fault distance. We apply our framework to design and analyze fault tolerant stabilizer channels for surface codes, revealing novel aspects of fault tolerant circuits.

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arXiv2023

Shorter quantum circuits via single-qubit gate approximation

We give a novel procedure for approximating general single-qubit unitaries from a finite universal gate set by reducing the problem to a novel magnitude approximation problem, achieving an immediate improvement in sequence length by a factor of 7/9. Extending the works arXiv:1612.01011 and arXiv:1612.02689, we show that taking probabilistic mixtures of channels to solve fallback (arXiv:1409.3552) and magnitude approximation problems saves factor of two in approximation costs. In particular, over the Clifford+$\sqrt{\mathrm{T}}$ gate set we achieve an average non-Clifford gate count of $0.23\log_2(1/\varepsilon)+2.13$ and T-count $0.56\log_2(1/\varepsilon)+5.3$ with mixed fallback approximations for diamond norm accuracy $\varepsilon$. This paper provides a holistic overview of gate approximation, in addition to these new insights. We give an end-to-end procedure for gate approximation for general gate sets related to some quaternion algebras, providing pedagogical examples using common fault-tolerant gate sets (V, Clifford+T and Clifford+$\sqrt{\mathrm{T}}$). We also provide detailed numerical results for Clifford+T and Clifford+$\sqrt{\mathrm{T}}$ gate sets. In an effort to keep the paper self-contained, we include an overview of the relevant algorithms for integer point enumeration and relative norm equation solving. We provide a number of further applications of the magnitude approximation problems, as well as improved algorithms for exact synthesis, in the Appendices.

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arXiv2023

Stabilizer circuit verification

The ubiquity of stabilizer circuits in the design and operation of quantum computers makes techniques to verify their correctness essential. The simulation of stabilizer circuits, which aims to replicate their behavior using a classical computer, is known to be efficient and provides a means of testing correctness. However, simulation is limited in its ability to examine the exponentially large space of possible measurement outcomes. We propose a comprehensive set of efficient classical algorithms to fully characterize and exhaustively verify stabilizer circuits with Pauli unitaries conditioned on parities of measurements. We introduce, as a practical characterization, a general form for such circuits and provide an algorithm to find a general form of any stabilizer circuit. We then provide an algorithm for checking the equivalence of stabilizer circuits. When circuits are not equivalent our algorithm suggests modifications for reconciliation. Next, we provide an algorithm that characterizes the logical action of a (physical) stabilizer circuit on an encoded input. All of our algorithms provide relations of measurement outcomes among corresponding circuit representations. Finally, we provide an analytic description of the logical action induced by measuring a stabilizer group, with application in correctness proofs of code-deformation protocols including lattice surgery and code switching.

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arXiv2022

Assessing requirements to scale to practical quantum advantage

While quantum computers promise to solve some scientifically and commercially valuable problems thought intractable for classical machines, delivering on this promise will require a large-scale quantum machine. Understanding the impact of architecture design choices for a scaled quantum stack for specific applications, prior to full realization of the quantum system, is an important open challenge. To this end, we develop a framework for quantum resource estimation, abstracting the layers of the stack, to estimate resources required across these layers for large-scale quantum applications. Using a tool that implements this framework, we assess three scaled quantum applications and find that hundreds of thousands to millions of physical qubits are needed to achieve practical quantum advantage. We identify three qubit parameters, namely size, speed, and controllability, that are critical at scale to rendering these applications practical. A goal of our work is to accelerate progress towards practical quantum advantage by enabling the broader community to explore design choices across the stack, from algorithms to qubits.

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arXiv2022

Space-time optimized table lookup

We describe a space-time optimized circuit for the table lookup subroutine from lattice-surgery surface code primitives respecting 2D grid connectivity. Table lookup circuits are ubiquitous in quantum computing, allowing the presented circuit to be used for applications ranging from cryptography to quantum chemistry. Surface code is the leading approach to scalable fault-tolerant quantum computing pursued by industry and academia. We abstract away surface code implementation details by using a minimal set of operations supported by the surface code via lattice-surgery. Our exposition is accessible to a reader not familiar with surface codes and fault-tolerant quantum computing.

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arXiv2022

QParallel: Explicit Parallelism for Programming Quantum Computers

We present a language extension for parallel quantum programming to (1) remove ambiguities concerning parallelism in current quantum programming languages and (2) facilitate space-time tradeoff investigations in quantum computing. While the focus of similar libraries in the domain of classical computing (OpenMP, OpenACC, etc.) is to divide a computation into multiple threads, the main goal of QParallel is to keep the compiler and the runtime system from introducing parallelism-inhibiting dependencies, e.g., through reuse of qubits in automatic qubit management. We describe the syntax and semantics of the proposed language extension, implement a prototype based on Q#, and present several examples and use cases to illustrate its performance benefits. Moreover, we introduce a tool that guides programmers in the placement of parallel regions by identifying the subroutines that profit most from parallelization, which is especially useful if the programmer's knowledge of the source code is limited. Support for QParallel can be added to any multithreading library and language extension, including OpenMP and OpenACC.

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