SearcharxivSearch

arXiv subjects

Veit Langrock

Publications and source records attributed to Veit Langrock.

4 recordsLinked to original sources

Blueprint of a scalable spin qubit shuttle device for coherent mid-range qubit transfer in disordered Si/SiGe/SiO$_2$

Silicon spin qubits stand out due to their very long coherence times, compatibility with industrial fabrication, and prospect to integrate classical control electronics. To achieve a truly scalable architecture, a coherent mid-range link that moves the electrons between qubit registers has been suggested to solve the signal fan-out problem. Here, we present a blueprint of such a $\approx 10\,μ$m long link, called a spin qubit shuttle, which is based on connecting an array of gates into a small number of sets. To control these sets, only a few voltage control lines are needed and the number of these sets and thus the number of required control signals is independent of the length of this link. We discuss two different operation modes for the spin qubit shuttle: A qubit conveyor, i.e. a potential minimum that smoothly moves laterally, and a bucket brigade, in which the electron is transported through a series of tunnel-coupled quantum dots by adiabatic passage. We find the former approach more promising considering a realistic Si/SiGe device including potential disorder from the charged defects at the Si/SiO$_2$ layer, as well as typical charge noise. Focusing on the qubit transfer fidelity in the conveyor shuttling mode, we discuss in detail motional narrowing, the interplay between orbital and valley excitation and relaxation in presence of $g$-factors that depend on orbital and valley state of the electron, and effects from spin-hotspots. We find that a transfer fidelity of 99.9 \% is feasible in Si/SiGe at a speed of $\sim$10 m/s, if the average valley splitting and its inhomogeneity stay within realistic bounds. Operation at low global magnetic field $\approx 20$ mT and material engineering towards high valley splitting is favourable for reaching high fidelities of transfer.

cond-mat.mes-hall

A reset-if-leaked procedure for encoded spin qubits

We report a substantially simplified procedure, based on group-theoretic reasoning, for the reduction of qubit leakage in exchange-only spin qubits. We to find exchange sequences which accomplish leakage reduction with only two additional spins and with as few as 14 nearest neighbor exchange interactions, less than half than previously reported. We show that the identified sequences are robust in the presence of realistic noise levels in the semiconductor environment. Our procedure also produces flag information that can be helpful in the implementation of quantum algorithms.

quant-ph

Large, tunable valley splitting and single-spin relaxation mechanisms in a Si/Si$_x$Ge$_{1-x}$ quantum dot

Valley splitting is a key figure of silicon-based spin qubits. Quantum dots in Si/SiGe heterostructures reportedly suffer from a relatively low valley splitting, limiting the operation temperature and the scalability of such qubit devices. Here, we demonstrate a robust and large valley splitting exceeding 200 $μ$eV in a gate-defined single quantum dot, hosted in molecular-beam epitaxy-grown $^{28}$Si/SiGe. The valley splitting is monotonically and reproducibly tunable up to 15 % by gate voltages, originating from a 6 nm lateral displacement of the quantum dot. We observe static spin relaxation times $T_1>1$ s at low magnetic fields in our device containing an integrated nanomagnet. At higher magnetic fields, $T_1$ is limited by the valley hotspot and by phonon noise coupling to intrinsic and artificial spin-orbit coupling, including phonon bottlenecking.

cond-mat.mes-hall

Towards a realistic GaAs-spin qubit device for a classical error-corrected quantum memory

Based on numerically-optimized real-device gates and parameters we study the performance of the phase-flip (repetition) code on a linear array of Gallium Arsenide (GaAs) quantum dots hosting singlet-triplet qubits. We first examine the expected performance of the code using simple error models of circuit-level and phenomenological noise, reporting, for example, a circuit-level depolarizing noise threshold of approximately 3%. We then perform density-matrix simulations using a maximum-likelihood and minimum-weight matching decoder to study the effect of real-device dephasing, read-out error, quasi-static as well as fast gate noise. Considering the trade-off between qubit read-out error and dephasing time (T2) over measurement time, we identify a sub-threshold region for the phase-flip code which lies within experimental reach.

quant-ph