arXiv subjects

Venkatesh Vadde

Publications and source records attributed to Venkatesh Vadde.

6 recordsLinked to original sources

arXiv2026

Reconfigurable field-free spin Hall nano-oscillators enabled by crystallographic anisotropy in epitaxial Co/Pt

Spin Hall nano-oscillators (SHNOs) are nanoscale microwave sources for wireless communication, neuromorphic computing and oscillator-based Ising machines, but conventional devices require a global magnetic bias. Here we replace this bias through crystallographic anisotropy in epitaxial Co/Pt. Growth of hcp Co with its c-axis in the film plane produces an anisotropy field of about 0.36 T and enables field-free auto-oscillations above 10 GHz in nanoconstriction SHNOs. The active current polarity is selected by the remanent magnetization, providing nonvolatile reconfiguration of the oscillation state. Micro-focused Brillouin light scattering confirms that the nonlinear response is confined to the nanoconstriction region. Lithographic control of the angle between the current and anisotropy axes tunes the excitation threshold and drives two spectral branches from separated modes to a dominant single branch, consistent with mutual synchronization. These results establish epitaxial crystallographic anisotropy as a route to reconfigurable field-free spintronic oscillators and oscillator networks.

cond-mat.mes-hall↗

arXiv2026

A 2048-spin bulk acoustic wave Ising machine for number partitioning and Sudoku

Optical coherent Ising machines based on time-multiplexing have demonstrated significant progress in terms of connectivity and spin scalability. However, they are constrained by large physical footprints, high power consumption, poor thermal stability, and high cost. Here, we present a time-multiplexed Ising machine leveraging propagating wave packets in solid-state delay lines at microwave frequencies, enabling thermally stable, robust, low-power, tabletop, and affordable design. We use two serially connected 20.5 MHz, 707 microseconds bulk acoustic wave delay lines supporting 2,048 spins. Our design provides all-to-all connectivity with 15-bit coupling resolution and finds approximate MAX-CUT solutions in 341 ms, potentially scalable to sub-ms by using higher frequency delay lines. Additionally, we demonstrate solutions to number partitioning and Sudoku problems. Compared with state-of-the-art Coherent Ising machines, our machine exhibits four orders of magnitude higher thermal stability. Against the simulated bifurcation algorithm, our design achieves comparable results on the MAX-CUT problem, while outperforming it on the more complex number-partitioning and Sudoku problems.

cond-mat.mes-hall↗

arXiv2024

A Comprehensive Convolutional Neural Network Architecture Design using Magnetic Skyrmion and Domain Wall

Spintronic-based neuromorphic hardware offers high-density and rapid data processing at nanoscale lengths by leveraging magnetic configurations like skyrmion and domain walls. Here, we present the maximal hardware implementation of a convolutional neural network (CNN) based on a compact multi-bit skyrmion-based synapse and a hybrid CMOS domain wall-based circuit for activation and max-pooling functionalities. We demonstrate the micromagnetic design and operation of a circular bilayer skyrmion system mimicking a scalable artificial synapse, demonstrated up to 6-bit (64 states) with an ultra-low energy consumption of 0.87 fJ per state update. We further show that the synaptic weight modulation is achieved by the perpendicular current interaction with the labyrinth-maze like uniaxial anisotropy profile, inducing skyrmionic gyration, thereby enabling long-term potentiation (LTP) and long-term depression (LTD) operations. Furthermore, we present a simultaneous rectified linear (ReLU) activation and max pooling circuitry featuring a SOT-based domain wall ReLU with a power consumption of 4.73 $μ$W. The ReLU function, stabilized by a parabolic uniaxial anisotropy profile, encodes domain wall positions into continuous resistance states coupled with the HSPICE circuit simulator. Our integrated skyrmion and domain wall-based spintronic hardware achieves 98.07% accuracy in convolutional neural network (CNN) based pattern recognition task, consuming 110 mW per image.

cond-mat.mes-hall↗

arXiv2024

Domain wall and Magnetic Tunnel Junction Hybrid for on-chip Learning in UNet architecture

We present spintronic devices based hardware implementation of UNet for segmentation tasks. Our approach involves designing hardware for convolution, deconvolution, rectified activation function (ReLU), and max pooling layers of the UNet architecture. We designed the convolution and deconvolution layers of the network using the synaptic behavior of the domain wall MTJ. We also construct the ReLU and max pooling functions of the network utilizing the spin hall driven orthogonal current injected MTJ. To incorporate the diverse physics of spin-transport, magnetization dynamics, and CMOS elements in our UNet design, we employ a hybrid simulation setup that couples micromagnetic simulation, non-equilibrium Green's function, SPICE simulation along with network implementation. We evaluate our UNet design on the CamVid dataset and achieve segmentation accuracies of 83.71$\%$ on test data, on par with the software implementation with 821mJ of energy consumption for on-chip training over 150 epochs. We further demonstrate nearly one order $(10\times)$ improvement in the energy requirement of the network using unstable ferromagnet ($Δ$=4.58) over the stable ferromagnet ($Δ$=45) based ReLU and max pooling functions while maintaining the similar accuracy. The hybrid architecture comprising domain wall MTJ and unstable FM-based MTJ leads to an on-chip energy consumption of 85.79mJ during training, with a testing energy cost of 1.55 $μJ$.

cs.ET↗

arXiv2023

Power efficient ReLU design for neuromorphic computing using spin Hall effect

We demonstrate a magnetic tunnel junction injected with spin Hall current to exhibit linear rotation of magnetization of the free-ferromagnet using only the spin current. Using the linear resistance change of the MTJ, we devise a circuit for the rectified linear activation (ReLU) function of the artificial neuron. We explore the role of different spin Hall effect (SHE) heavy metal layers on the power consumption of the ReLU circuit. We benchmark the power consumption of the ReLU circuit with different SHE layers by defining a new parameter called the spin Hall power factor. It combines the spin Hall angle, resistivity, and thickness of the heavy metal layer, which translates to the power consumption of the different SHE layers during spin-orbit switching/rotation of the free FM. We employ a hybrid spintronics-CMOS simulation framework that couples Keldysh non-equilibrium Green's function formalism with Landau-Lifshitz-Gilbert-Slonzewski equations and the HSPICE circuit simulator to account for diverse physics of spin-transport and the CMOS elements in our proposed ReLU design. We also demonstrate the robustness of the proposed ReLU circuit against thermal noise and non-trivial power-error trade-off that enables the use of an unstable free-ferromagnet for energy-efficient design. Using the proposed circuit, we evaluate the performance of the convolutional neural network for MNIST datasets and demonstrate comparable classification accuracies to the ideal ReLU with an energy consumption of 75 $pJ$ per sample.

cond-mat.mes-hall↗

arXiv2023

Orthogonal Spin Current Injected Magnetic Tunnel Junction for Convolutional Neural Networks

We propose that a spin Hall effect driven magnetic tunnel junction device can be engineered to provide a continuous change in the resistance across it when injected with orthogonal spin currents. Using this concept, we develop a hybrid device-circuit simulation platform to design a network that realizes multiple functionalities of a convolutional neural network. At the atomistic level, we use the Keldysh non-equilibrium Green's function technique that is coupled self-consistently with the stochastic Landau-Lifshitz-Gilbert-Slonczewski equations, which in turn is coupled with the HSPICE circuit simulator. We demonstrate the simultaneous functionality of the proposed network to evaluate the rectified linear unit and max-pooling functionalities. We present a detailed power and error analysis of the designed network against the thermal stability factor of the free ferromagnets. Our results show that there exists a non-trivial power-error trade-off in the proposed network, which enables an energy-efficient network design based on unstable free ferromagnets with reliable outputs. The static power for the proposed ReLU circuit is $0.56μW$ and whereas the energy cost of a nine-input rectified linear unit-max-pooling network with an unstable free ferromagnet($Δ=15$) is $3.4pJ$ in the worst-case scenario. We also rationalize the magnetization stability of the proposed device by analyzing the vanishing torque gradient points.

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