arXiv subjects

Xiangrui Yang

Publications and source records attributed to Xiangrui Yang.

6 recordsLinked to original sources

arXiv2026

vToken: Token-Level Virtualization for Reclaimable KV Caches

Large language model serving faces a critical memory bottleneck: the KV cache grows with sequence length and batch size. PagedAttention uses fixed-size memory blocks to reduce allocator-level fragmentation, but recent KV eviction algorithms operate at a token granularity finer than block-level management. This mismatch causes intra-block fragmentation, leaving a large fraction of allocated KV memory unreclaimable. We present vToken, a lightweight token-level virtualization layer that decouples logical token liveness from physical block placement. vToken maintains a stable logical token view through token-table indirection and realizes physical reclamation by repacking live tokens asynchronously. The design preserves PagedAttention kernels and CUDA Graph compatibility. We implement vToken in vLLM and evaluate it with H2O, Random, and Scissorhands across models. Compared with a paired Naive-Evict baseline, vToken reduces retained KV blocks per request by 27.2\%--72.3\% and improves SLA-constrained throughput by up to 1.37$\times$. Under a constrained active-KV budget, it extends the maximum feasible concurrency by up to 2$\times$, while reducing the per-policy integration footprint from 500+ lines to under 50.

cs.AI↗

arXiv2026

EPIC: Abstraction and Polymorphism of In-Network Collectives on Ethernet

In-Network Collective (INC) acceleration holds immense potential for optimizing AI training and inference; however, its cross-layer nature has historically hindered investment and adoption within the open Ethernet ecosystem. To bridge this gap, we propose EPIC (Ethernet Polymorphic In-network Collective), an INC protocol specification and reference system built on the principle of "Unified Abstraction, Polymorphic Realization." EPIC introduces an abstraction compatible with standard Ethernet that aligns functional boundaries with participant roles, while offering polymorphic realizations tailored to varying hardware capabilities. We address three fundamental challenges: first, we employ a modular design that enables an evolutionary path from simple to complex implementations, allowing vendors to iterate their hardware incrementally; second, we apply formal verification methodologies to prove the correctness of all proposed polymorphic modes; and third, we develop a unified resource management model versatile enough for diverse INC scenarios. Extensive validation -- spanning model checking, packet/flow simulations, VM emulation, Tofino Testbed, and FPGA/RTL verification -- confirms EPIC's correctness, performance gain, and feasibility.

cs.DC↗

arXiv2024

Towards Memory-Efficient Traffic Policing in Time-Sensitive Networking

Time-Sensitive Networking (TSN) is an emerging real-time Ethernet technology that provides deterministic communication for time-critical traffic. At its core, TSN relies on Time-Aware Shaper (TAS) for pre-allocating frames in specific time intervals and Per-Stream Filtering and Policing (PSFP) for mitigating the fatal disturbance of unavoidable frame drift. However, as first identified in this work, PSFP incurs heavy memory consumption during policing, hindering normal switching functionalities. This work proposes a lightweight policing design called FooDog, which could facilitate sub-microsecond jitter with ultra-low memory consumption. FooDog employs a period-wise and stream-wise structure to realize the memory-efficient PSFP without loss of determinism. Results using commercial FPGAs in typical aerospace scenarios show that FooDog could keep end-to-end time-sensitive traffic jitter <150 nanoseconds in the presence of abnormal traffic, comparable to typical TSN performance without anomalies. Meanwhile, it consumes merely hundreds of kilobits of memory, reducing >90% of on-chip memory overheads than unoptimized PSFP design.

cs.NI↗

arXiv2022

Leveraging Orbital Information and Atomic Feature in Deep Learning Model

Predicting material properties base on micro structure of materials has long been a challenging problem. Recently many deep learning methods have been developed for material property prediction. In this study, we propose a crystal representation learning framework, Orbital CrystalNet, OCrystalNet, which consists of two parts: atomic descriptor generation and graph representation learning. In OCrystalNet, we first incorporate orbital field matrix (OFM) and atomic features to construct OFM-feature atomic descriptor, and then the atomic descriptor is used as atom embedding in the atom-bond message passing module which takes advantage of the topological structure of crystal graphs to learn crystal representation. To demonstrate the capabilities of OCrystalNet we performed a number of prediction tasks on Material Project dataset and JARVIS dataset and compared our model with other baselines and state of art methods. To further present the effectiveness of OCrystalNet, we conducted ablation study and case study of our model. The results show that our model have various advantages over other state of art models.

cond-mat.mtrl-sci↗

arXiv2022

PTCT: Patches with 3D-Temporal Convolutional Transformer Network for Precipitation Nowcasting

Precipitation nowcasting is to predict the future rainfall intensity over a short period of time, which mainly relies on the prediction of radar echo sequences. Though convolutional neural network (CNN) and recurrent neural network (RNN) are widely used to generate radar echo frames, they suffer from inductive bias (i.e., translation invariance and locality) and seriality, respectively. Recently, Transformer-based methods also gain much attention due to the great potential of Transformer structure, whereas short-term dependencies and autoregressive characteristic are ignored. In this paper, we propose a variant of Transformer named patches with 3D-temporal convolutional Transformer network (PTCT), where original frames are split into multiple patches to remove the constraint of inductive bias and 3D-temporal convolution is employed to capture short-term dependencies efficiently. After training, the inference of PTCT is performed in an autoregressive way to ensure the quality of generated radar echo frames. To validate our algorithm, we conduct experiments on two radar echo dataset: Radar Echo Guangzhou and HKO-7. The experimental results show that PTCT achieves state-of-the-art (SOTA) performance compared with existing methods.

cs.CV↗

arXiv2022

Isolation mechanisms for high-speed packet-processing pipelines

Data-plane programmability is now mainstream. As we find more use cases, deployments need to be able to run multiple packet-processing modules in a single device. These are likely to be developed by independent teams, either within the same organization or from multiple organizations. Therefore, we need isolation mechanisms to ensure that modules on the same device do not interfere with each other. This paper presents Menshen, an extension of the Reconfigurable Match Tables (RMT) pipeline that enforces isolation between different packet-processing modules. Menshen is comprised of a set of lightweight hardware primitives and an extension to the open source P4-16 reference compiler that act in conjunction to meet this goal. We have prototyped Menshen on two FPGA platforms (NetFPGA and Corundum). We show that our design provides isolation, and allows new modules to be loaded without impacting the ones already running. Finally, we demonstrate that feasibility of implementing Menshen on ASICs by using the FreePDK45nm technology library and the Synopsys DC synthesis software, showing that our design meets timing at a 1GHz clock frequency and needs approximately 6% additional chip area. We have open sourced the code for Menshen's hardware and software at https://isolation.quest/.

cs.NI↗