arXiv subjects

Xudong Jing

Publications and source records attributed to Xudong Jing.

3 recordsLinked to original sources

arXiv2026

Integrated magnonic neural circuits based on nonlinear wave neurons

Artificial intelligence is driving intense interest in alternative computing hardware capable of neural information processing beyond conventional charge-based electronics. Among emerging approaches, wave-based computing promises highly parallel and energy-efficient operation, but scalable physical neural hardware has remained elusive because wave systems generally lack cascadable nonlinear neurons with signal regeneration and phase-robust operation. Here we demonstrate integrated magnonic neural circuits based on nonlinear threshold neurons realized in nanoscale yttrium iron garnet waveguides. The neurons perform weighted summation of multiple spin-wave inputs, while a pump-controlled nonlinear activation defines continuously tunable firing thresholds. Owing to deeply nonlinear spin-wave dynamics, the activated neurons emit self-normalized outputs whose intensities are largely independent of the input amplitudes, while nonlinear phase self-adjustment suppresses sensitivity to the relative input phases, enabling deterministic neuron-to-neuron cascading without external signal restoration. We experimentally realize programmable threshold neurons, reconfigurable weighted classification and deterministic cascading between sequential neuronal stages, and further demonstrate reconfigurable physical pattern recognition in a seven-neuron integrated magnonic circuit through experimental classification of the binary letter patterns 'HUST'. These results establish nonlinear magnons as a scalable platform for integrated neural hardware and position nonlinear wave dynamics as a general paradigm for physical neuromorphic computing.

cond-mat.mtrl-sci↗

arXiv2026

True random number generation through stochastic magnonic bistability

True random number generators (TRNGs) underpin modern cryptography, yet existing implementations face fundamental trade-offs between speed, scalability, and entropy quality. Here, we demonstrate that stochastic switching in the bistable regime of spin-wave dynamics provides a physical entropy source for high-quality random number generation. Our magnonic random number generator (mRNG), based on a lithography-patterned microstrip on yttrium iron garnet (YIG), exploits thermal fluctuations near the nonlinear bistable regime to generate random bitstreams that pass all 15 NIST SP 800-22 statistical tests at rates with 20 Mb/s. We implement a random-bit multiplier using synchronized mRNG units and demonstrate scalability to 200-nm-wide nanoscale waveguides, establishing spin-wave bistability as a viable physical entropy source for integrated random number generation.

cond-mat.mtrl-sci↗

arXiv2026

Integrated magnonic chip using cascaded logic

The transistor transformed not only electronics but everyday life, and the integrated circuit - now simply the "chip" - made computation scalable and ubiquitous. Magnonics has long promised a parallel path to low-energy information processing by using spin waves instead of charge. Progress, however, has been limited by two fundamental obstacles: intrinsic attenuation of spin waves and the requirement for precisely normalised output intensity and input phase to ensure reliable logic operation - conditions that are difficult to maintain in large-scale circuits owing to inevitable imperfections. Here, we report an integrated magnonic circuit that overcomes both limitations through engineered nonlinearity in nanoscale yttrium iron garnet waveguides. Nonlinear self-adjustment of the spin wave phase renders logic operation insensitive to the relative phases of the inputs, while a deeply nonlinear, threshold-activated self-normalised excitation restores and standardises the output intensity. Using space-resolved micro-focused Brillouin light scattering, we demonstrate reconfigurable AND, OR and three-input majority gates and realise deterministic cascading across sequential stages, establishing a scalable on-chip logic primitive. The architecture operates with gigahertz frequencies, supports dynamic threshold control for functional reconfiguration, and is compatible with scalable integration, making it attractive for adaptive and neuromorphic computing. By resolving phase-independent operation and signal restoration at the level of device physics, this work advances magnonics from isolated proof-of-concept devices towards integrated magnonic chips that can complement advanced CMOS in energy-constrained computing tasks.

cond-mat.mtrl-sci↗